[llvm] [RISCV][GISEL] Legalize G_INSERT_SUBVECTOR (PR #108859)
Thorsten Schütt via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 16 12:04:26 PDT 2024
================
@@ -915,6 +921,152 @@ bool RISCVLegalizerInfo::legalizeSplatVector(MachineInstr &MI,
return true;
}
+static LLT getLMUL1Ty(LLT VecTy) {
+ assert(VecTy.getElementType().getSizeInBits() <= 64 &&
+ "Unexpected vector LLT");
+ return LLT::scalable_vector(RISCV::RVVBitsPerBlock /
+ VecTy.getElementType().getSizeInBits(),
+ VecTy.getElementType());
+}
+
+bool RISCVLegalizerInfo::legalizeInsertSubvector(MachineInstr &MI,
+ MachineIRBuilder &MIB) const {
+ GInsertSubvector &IS = cast<GInsertSubvector>(MI);
+
+ MachineRegisterInfo &MRI = *MIB.getMRI();
+
+ Register Dst = IS.getOperand(0).getReg();
----------------
tschuett wrote:
`IS.getReg(0);`
https://github.com/llvm/llvm-project/pull/108859
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