[llvm] [NVPTX] Load/Store/Fence syncscope support (PR #106101)

[Artem Belevich via llvm-commits]

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@@ -100,8 +116,9 @@ class LLVM_LIBRARY_VISIBILITY NVPTXDAGToDAGISel : public SelectionDAGISel {
 
   static unsigned GetConvertOpcode(MVT DestTy, MVT SrcTy, LoadSDNode *N);
 
-  NVPTX::Ordering insertMemoryInstructionFence(SDLoc DL, SDValue &Chain,
-                                               MemSDNode *N);
+  std::pair<NVPTX::Ordering, NVPTX::Scope>
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Artem-B wrote:

The comment gives an impression that the fence instructions are always inserted, while IIUIC, it inserts fence instructions only *if* such instructions are needed.
I'd rephrase it along the lines of "Inserts an appropriate fence instruction, if it's required to implement particular ordering"


https://github.com/llvm/llvm-project/pull/106101