[llvm] [AMDGPU] Avoid unneeded waitcounts before spill stores (PR #108303)
Stanislav Mekhanoshin via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 16 11:04:50 PDT 2024
================
@@ -901,7 +901,16 @@ void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII,
}
} else /* LGKM_CNT || EXP_CNT || VS_CNT || NUM_INST_CNTS */ {
// Match the score to the destination registers.
- for (unsigned I = 0, E = Inst.getNumOperands(); I != E; ++I) {
+ //
+ // Check only explicit operands. Stores, especially spill stores, include
+ // implicit uses and defs of their super registers which would create an
+ // artificial dependency, while these are there only for register liveness
+ // accounting purposes.
+ //
+ // Special cases where implicit register defs and uses exists, such as
+ // M0, FLAT_SCR or VCC, but the wait will be generated earlier in the
+ // generateWaitcntInstBefore() if that was loaded from memory.
+ for (unsigned I = 0, E = Inst.getNumExplicitOperands(); I != E; ++I) {
----------------
rampitec wrote:
Thanks. There are several similar loops here, I will address it in a separate NFCI.
https://github.com/llvm/llvm-project/pull/108303
More information about the llvm-commits
mailing list