[llvm] [llvm][ARM][CodeGen] Disable MEMCPY LDM/STM inlining for Cortex v7-m (PR #106378)

[David Green via llvm-commits]

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@@ -465,6 +465,16 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
   /// True if fast-isel is used.
   bool useFastISel() const;
 
+  /// True if ARMISD::MEMCPY should not be created/expanded specially (e.g.
+  /// as LDM/STM pairs).
+  bool wantsMEMCPYAsLdSt() const { return HasV7Ops && ARMProcClass == MClass; }
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davemgreen wrote:

If there is a subtarget feature, this method it probably unnecessary.

https://github.com/llvm/llvm-project/pull/106378