[llvm] [llvm][ARM][CodeGen] Disable MEMCPY LDM/STM inlining for Cortex v7-m (PR #106378)

[Nashe Mncube via llvm-commits]

nasherm wrote:

> Do you have any benchmark numbers for what performance difference this makes? 

Sorry that replies to these questions took so long. With respect to performance difference, on cortex-m7 we see performance improvements of around 0.5 to 1% on some benchmarks with no significant regressions on others.

Does this only affect specific v7-M cores, or should it apply to later architecture versions too?

Yes this only affects v7-m looking at investigations that were done by the original author.

I've added some new tests in the latest patch, do let me know if these are sufficient to cover edge cases

https://github.com/llvm/llvm-project/pull/106378