[llvm] [AMDGPU] V_SET_INACTIVE optimizations (PR #98864)

[Carl Ritson via llvm-commits]

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@@ -1514,7 +1536,19 @@ bool SIWholeQuadMode::lowerCopyInstrs() {
                           ? (unsigned)AMDGPU::COPY
                           : TII->getMovOpcode(TRI->getRegClassForOperandReg(
                                 *MRI, MI->getOperand(0)));
+    int Index = MI->findRegisterDefOperandIdx(AMDGPU::SCC, /*TRI=*/nullptr);
+    while (Index >= 0) {
+      MI->removeOperand(Index);
+      Index = MI->findRegisterUseOperandIdx(AMDGPU::SCC, /*TRI=*/nullptr);
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perlfu wrote:

Instruction can have both `implicit-def $scc` and `implicit $scc`.
I wouldn't expect more than 1 of each, although very occasionally odd (broken?) code gen can yield multiple implicit uses of same phys.
If you search the tests you'll find some examples of `implicit $exec, implicit $exec`

https://github.com/llvm/llvm-project/pull/98864