[llvm] [X86] Remove X86RegisterInfo::getSEHRegNum. (PR #106866)
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Sat Aug 31 11:33:12 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-x86
Author: Craig Topper (topperc)
<details>
<summary>Changes</summary>
As far as I can tell, there's no way to call this. There are no calls in the X86 directory. It has the same name as a function in MCRegisterInfo, but that function takes a MCRegister and isn't virtual.
The function in MCRegisterInfo uses a DenseMap populated by `X86_MC::initLLVMToSEHAndCVRegMapping`. The DenseMap is populated for every physical register using the encoding value. I think that means the function in MCRegisterInfo would return the same value as the function in X86RegisterInfo.
---
Full diff: https://github.com/llvm/llvm-project/pull/106866.diff
2 Files Affected:
- (modified) llvm/lib/Target/X86/X86RegisterInfo.cpp (-5)
- (modified) llvm/lib/Target/X86/X86RegisterInfo.h (-3)
``````````diff
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp
index 638eb1c4f11e41..1d8808f4e2b7d0 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.cpp
+++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp
@@ -83,11 +83,6 @@ X86RegisterInfo::X86RegisterInfo(const Triple &TT)
}
}
-int
-X86RegisterInfo::getSEHRegNum(unsigned i) const {
- return getEncodingValue(i);
-}
-
const TargetRegisterClass *
X86RegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC,
unsigned Idx) const {
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.h b/llvm/lib/Target/X86/X86RegisterInfo.h
index 7296a5f021e4ad..2f73698a4b94d3 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.h
+++ b/llvm/lib/Target/X86/X86RegisterInfo.h
@@ -54,9 +54,6 @@ class X86RegisterInfo final : public X86GenRegisterInfo {
/// Return the number of registers for the function.
unsigned getNumSupportedRegs(const MachineFunction &MF) const override;
- // FIXME: This should be tablegen'd like getDwarfRegNum is
- int getSEHRegNum(unsigned i) const;
-
/// getMatchingSuperRegClass - Return a subclass of the specified register
/// class A so that each register in it has a sub-register of the
/// specified sub-register index which is in the specified register class B.
``````````
</details>
https://github.com/llvm/llvm-project/pull/106866
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