[llvm] 2afa975 - [RISCV] Use MCRegister for vectors in CC_RISCV_FastCC. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2024-08-31T10:51:39-07:00
New Revision: 2afa9759280393fddb8f9a3be3bb28dbab73d56b

URL: https://github.com/llvm/llvm-project/commit/2afa9759280393fddb8f9a3be3bb28dbab73d56b
DIFF: https://github.com/llvm/llvm-project/commit/2afa9759280393fddb8f9a3be3bb28dbab73d56b.diff

LOG: [RISCV] Use MCRegister for vectors in CC_RISCV_FastCC. NFC

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 1b0befb1d70738..1d939bcd059475 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -19573,7 +19573,7 @@ bool RISCV::CC_RISCV_FastCC(const DataLayout &DL, RISCVABI::ABI ABI,
   }
 
   if (LocVT.isVector()) {
-    if (unsigned Reg =
+    if (MCRegister Reg =
             allocateRVVReg(ValVT, ValNo, FirstMaskArgument, State, TLI)) {
       // Fixed-length vectors are located in the corresponding scalable-vector
       // container types.