[llvm] [ARM][Codegen] Fix vector data miscompilation in arm32be (PR #105519)

[via llvm-commits]

Zhenhang1213 wrote:

> > Did you manage to look into fixing PerformBITCASTCombine yet?
> 
> And I think if we don't fix by change ISD::BITCAST to ARMISD::VECTOR_REG_CAST, could I Identify the failure scenario of this test case, and in PerformBITCASTCombine function, call ARMISD::VECTOR_REG_CAST?

I looked at this question again and did I have a chance to flip it when concat_vectors in PerformBITCASTCombine ?

https://github.com/llvm/llvm-project/pull/105519