[llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)

[Phoebe Wang via llvm-commits]

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@@ -1275,6 +1275,56 @@ void SelectionDAGLegalize::LegalizeOp(SDNode *Node) {
       }
     }
     break;
+    case ISD::FCANONICALIZE: {
+      const Triple &TT = DAG.getTarget().getTargetTriple();
+      if (TT.getArch() == Triple::x86 || TT.getArch() == Triple::x86_64) {
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phoebewang wrote:

If you search `fcanonicalize` in td files, you will find LoongArch/Mips/PowerPC also define it by patterns. Besides, AArach64 has a test for `llvm.canonicalize.f32`. So it looks like most mainstream targets support it to some extent.

This isn't really duplication. E.g., LoongArch/Mips use fmin/fmax to lower it. Maybe fmul/fadd is more expensive to them, but X86 cannot use fmin/fmax because it doesn't support signed zero.

https://github.com/llvm/llvm-project/pull/106370