[llvm] [X86] Stop adding liveins for virtual registers in emitStackProbeInlineWindowsCoreCLR64. (PR #106828)
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Fri Aug 30 22:52:18 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-x86
Author: Craig Topper (topperc)
<details>
<summary>Changes</summary>
In the livein interface, the register goes through a MCPhysReg which is uint16_t. This causes the virtual register bit to be dropped making it alias to some nonsense physical register.
Found by llvm/test/CodeGen/X86/win_coreclr_chkstk.ll after replacing the MCPhysReg with MCRegister.
---
Full diff: https://github.com/llvm/llvm-project/pull/106828.diff
1 Files Affected:
- (modified) llvm/lib/Target/X86/X86FrameLowering.cpp (+8-4)
``````````diff
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index 43a3219f789c4a..39ccf22e580ade 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -1037,7 +1037,8 @@ void X86FrameLowering::emitStackProbeInlineWindowsCoreCLR64(
.addImm(X86::COND_AE);
// Add code to roundMBB to round the final stack pointer to a page boundary.
- RoundMBB->addLiveIn(FinalReg);
+ if (InProlog)
+ RoundMBB->addLiveIn(FinalReg);
BuildMI(RoundMBB, DL, TII.get(X86::AND64ri32), RoundedReg)
.addReg(FinalReg)
.addImm(PageMask);
@@ -1054,7 +1055,8 @@ void X86FrameLowering::emitStackProbeInlineWindowsCoreCLR64(
.addMBB(LoopMBB);
}
- LoopMBB->addLiveIn(JoinReg);
+ if (InProlog)
+ LoopMBB->addLiveIn(JoinReg);
addRegOffset(BuildMI(LoopMBB, DL, TII.get(X86::LEA64r), ProbeReg), JoinReg,
false, -PageSize);
@@ -1067,7 +1069,8 @@ void X86FrameLowering::emitStackProbeInlineWindowsCoreCLR64(
.addReg(0)
.addImm(0);
- LoopMBB->addLiveIn(RoundedReg);
+ if (InProlog)
+ LoopMBB->addLiveIn(RoundedReg);
BuildMI(LoopMBB, DL, TII.get(X86::CMP64rr))
.addReg(RoundedReg)
.addReg(ProbeReg);
@@ -1091,7 +1094,8 @@ void X86FrameLowering::emitStackProbeInlineWindowsCoreCLR64(
// Now that the probing is done, add code to continueMBB to update
// the stack pointer for real.
- ContinueMBB->addLiveIn(SizeReg);
+ if (InProlog)
+ ContinueMBB->addLiveIn(SizeReg);
BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::SUB64rr), X86::RSP)
.addReg(X86::RSP)
.addReg(SizeReg);
``````````
</details>
https://github.com/llvm/llvm-project/pull/106828
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