[llvm] 0717898 - Fix cl::desc typos in aarch64-enable-dead-defs and arm-implicit-it. (#106712)

[via llvm-commits]

Author: rjmansfield
Date: 2024-08-30T19:15:05+01:00
New Revision: 07178981246c56e8beafe7fe49f0f442436f08c4

URL: https://github.com/llvm/llvm-project/commit/07178981246c56e8beafe7fe49f0f442436f08c4
DIFF: https://github.com/llvm/llvm-project/commit/07178981246c56e8beafe7fe49f0f442436f08c4.diff

LOG: Fix cl::desc typos in aarch64-enable-dead-defs and arm-implicit-it. (#106712)

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
    llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index bd5684a287381a..9f96f6c5e83ec4 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -98,7 +98,7 @@ static cl::opt<bool> EnableCollectLOH(
 static cl::opt<bool>
     EnableDeadRegisterElimination("aarch64-enable-dead-defs", cl::Hidden,
                                   cl::desc("Enable the pass that removes dead"
-                                           " definitons and replaces stores to"
+                                           " definitions and replaces stores to"
                                            " them with stores to the zero"
                                            " register"),
                                   cl::init(true));

diff  --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index b7dfcc15824dc7..10fef901f77181 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -79,7 +79,7 @@ enum class ImplicitItModeTy { Always, Never, ARMOnly, ThumbOnly };
 
 static cl::opt<ImplicitItModeTy> ImplicitItMode(
     "arm-implicit-it", cl::init(ImplicitItModeTy::ARMOnly),
-    cl::desc("Allow conditional instructions outdside of an IT block"),
+    cl::desc("Allow conditional instructions outside of an IT block"),
     cl::values(clEnumValN(ImplicitItModeTy::Always, "always",
                           "Accept in both ISAs, emit implicit ITs in Thumb"),
                clEnumValN(ImplicitItModeTy::Never, "never",