[llvm] [AArch64] Prevent generating tbl instruction instead of smull (PR #106375)

[Florian Hahn via llvm-commits]

================
@@ -16795,6 +16795,16 @@ bool AArch64TargetLowering::optimizeExtendOrTruncateConversion(
 
       DstTy = TruncDstType;
     }
+
+    // mul(zext(i8), sext) can be transformed into smull(zext, sext) when
+    // destination type is at least SrcWidth * 4, which is faster than using tbl
+    // instructions
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fhahn wrote:

I think that should at most SrcWidth * 4?

```suggestion
    // mul(zext(i8), sext) can be transformed into smull(zext, sext) which performs one extend implicitly. If DstWidth is at most 4 * SrcWidth, at most one extra extend step is needed and using tbl is not profitable.
```

https://github.com/llvm/llvm-project/pull/106375