[llvm] [InstCombine][X86] Only demand the active index bits for VPERMV/VPERMV3 mask values (PR #106750)

via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 30 10:23:27 PDT 2024


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@@ -2144,6 +2144,22 @@ static Value *simplifyX86vpermv3(const IntrinsicInst &II,
   return Builder.CreateShuffleVector(V1, V2, ArrayRef(Indexes, Size));
 }
 
+// Simplify VPERMV/VPERMV3 mask - only demand the active index bits.
+static bool simplifyX86VPERMMask(Instruction *II, bool IsBinary,
+                                 InstCombiner &IC) {
+  auto *VecTy = cast<FixedVectorType>(II->getType());
+  unsigned EltSizeInBits = VecTy->getScalarSizeInBits();
+  unsigned NumElts = VecTy->getNumElements();
+  assert(isPowerOf2_32(NumElts) && isPowerOf2_32(EltSizeInBits) &&
+         "Unexpected shuffle mask size");
+
+  unsigned IdxSizeInBits = Log2_32(IsBinary ? (2 * NumElts) : NumElts);
+  APInt DemandedMask = APInt::getLowBitsSet(EltSizeInBits, IdxSizeInBits);
+
+  KnownBits KnownMask(EltSizeInBits);
+  return IC.SimplifyDemandedBits(II, 1, DemandedMask, KnownMask);
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goldsteinn wrote:

nit: `/*OpNo=1*/1`

https://github.com/llvm/llvm-project/pull/106750


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