[llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)
Pawan Nirpal via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 30 07:43:03 PDT 2024
================
@@ -1275,6 +1275,56 @@ void SelectionDAGLegalize::LegalizeOp(SDNode *Node) {
}
}
break;
+ case ISD::FCANONICALIZE: {
+ const Triple &TT = DAG.getTarget().getTargetTriple();
+ if (TT.getArch() == Triple::x86 || TT.getArch() == Triple::x86_64) {
----------------
pawan-nirpal-031 wrote:
You mean to say either
Get rid of all this code from legalization and put it elsewhere say in say X86IselLowering/doing combines. I did that, look at the following code, and then select variables using tablegen
```
SDValue combineConstantOrUndefCanonicalize(SDNode *Node,SelectionDAG &DAG){
SDValue Operand = Node->getOperand(0);
SDLoc dl(Node);
EVT VT = Operand.getValueType();
if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Operand)) {
const APFloat &C = CFP->getValueAPF();
if (C.isDenormal()) {
DenormalMode Mode =
DAG.getMachineFunction().getDenormalMode(C.getSemantics());
assert((Mode != DenormalMode::getPositiveZero()) &&
"Positive denormal mode is not valid for X86 target.");
if (Mode == DenormalMode::getPreserveSign()) {
SDValue SDZero =
DAG.getConstantFP((C.isNegative() ? -0.0 : 0.0), dl, VT);
return SDZero;
} else if (Mode == DenormalMode::getIEEE()) {
return Operand;
}
} else if (C.isNaN() && C.isSignaling()) {
APFloat CanonicalQNaN = APFloat::getQNaN(C.getSemantics());
SDValue QuitNaN = DAG.getConstantFP(CanonicalQNaN, dl, VT);
return QuitNaN;
}
}else if (Operand.isUndef()) {
APFloat CanonicalQNaN =
APFloat::getQNaN(VT.getFltSemantics());
SDValue QuitNaN = DAG.getConstantFP(CanonicalQNaN, dl, VT);
return QuitNaN;
}
return Operand;
}
```
**OR**
use ISD::STRICT_FMUL/ISD::STRICT_FADD instead of ISD::FADD ( well this crashes saying unable to select strict_fmul ) but assuming that crash is resolved, but there is still then the above function ```combineConstantOrUndefCanonicalize``` in x86isellowering will not be reachable as selection will replace everything with mul. So then are you saying let it replace with mul ( whatever the case subnormals/consts/vars ) and later it will be optimized away or don't care whatever happens as long as mul remains. If not then continuing the train of thought from ```combineConstantOrUndefCanonicalize``` not being reached as selection and x86isellowering is tightly coupled, and selection will do it's thing as per this patch, in this case we will be unable to handle subnormals as intrinsic will be gone by then.
**OR**
Just do the following here itself in legalizer.
```
if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Operand)) {
const APFloat &C = CFP->getValueAPF();
if (C.isDenormal()) {
DenormalMode Mode =
DAG.getMachineFunction().getDenormalMode(C.getSemantics());
assert((Mode != DenormalMode::getPositiveZero()) &&
"Positive denormal mode is not valid for X86 target.");
if (Mode == DenormalMode::getPreserveSign()) {
SDValue SDZero =
DAG.getConstantFP((C.isNegative() ? -0.0 : 0.0), dl, VT);
NewNode = SDZero.getNode();
} else if (Mode == DenormalMode::getIEEE()) {
NewNode = Operand.getNode();
}
} else if (C.isNaN() && C.isSignaling()) {
APFloat CanonicalQNaN = APFloat::getQNaN(C.getSemantics());
SDValue QuitNaN = DAG.getConstantFP(CanonicalQNaN, dl, VT);
NewNode = QuitNaN.getNode();
}
} else if (Operand.isUndef()) {
APFloat CanonicalQNaN = APFloat::getQNaN(VT.getFltSemantics());
SDValue QuitNaN = DAG.getConstantFP(CanonicalQNaN, dl, VT);
NewNode = QuitNaN.getNode();
}
break;
}
```
https://github.com/llvm/llvm-project/pull/106370
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