[llvm] [AArch64] Lower partial add reduction to udot or svdot (PR #101010)

[Paul Walker via llvm-commits]

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@@ -1594,6 +1594,11 @@ class SelectionDAG {
   /// the target's desired shift amount type.
   SDValue getShiftAmountOperand(EVT LHSTy, SDValue Op);
 
+  /// Expand a partial reduction intrinsic call.
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paulwalker-arm wrote:

What about "Create the DAG equivalent of vector_partial_reduce_add whereby...."?

https://github.com/llvm/llvm-project/pull/101010