[llvm] [RISCV] Bitcast fixed length bf16/f16 build_vector to i16 with Zvfbfmin/Zvfhmin+Zfbfmin/Zfhmin. (PR #106637)

[Craig Topper via llvm-commits]

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@@ -169,12 +171,95 @@ define <4 x half> @splat_c3_v4f16(<4 x half> %v) {
 }
 
 define <4 x half> @splat_idx_v4f16(<4 x half> %v, i64 %idx) {
-; CHECK-LABEL: splat_idx_v4f16:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
-; CHECK-NEXT:    vrgather.vx v9, v8, a0
-; CHECK-NEXT:    vmv1r.v v8, v9
-; CHECK-NEXT:    ret
+; RV32ZVFH-LABEL: splat_idx_v4f16:
+; RV32ZVFH:       # %bb.0:
+; RV32ZVFH-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
+; RV32ZVFH-NEXT:    vrgather.vx v9, v8, a0
+; RV32ZVFH-NEXT:    vmv1r.v v8, v9
+; RV32ZVFH-NEXT:    ret
+;
+; RV64ZVFH-LABEL: splat_idx_v4f16:
+; RV64ZVFH:       # %bb.0:
+; RV64ZVFH-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
+; RV64ZVFH-NEXT:    vrgather.vx v9, v8, a0
+; RV64ZVFH-NEXT:    vmv1r.v v8, v9
+; RV64ZVFH-NEXT:    ret
+;
+; RV32-NO-ZFHMIN-LABEL: splat_idx_v4f16:
+; RV32-NO-ZFHMIN:       # %bb.0:
+; RV32-NO-ZFHMIN-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
+; RV32-NO-ZFHMIN-NEXT:    vrgather.vx v9, v8, a0
+; RV32-NO-ZFHMIN-NEXT:    vmv1r.v v8, v9
+; RV32-NO-ZFHMIN-NEXT:    ret
+;
+; RV64-NO-ZFHMIN-LABEL: splat_idx_v4f16:
+; RV64-NO-ZFHMIN:       # %bb.0:
+; RV64-NO-ZFHMIN-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
+; RV64-NO-ZFHMIN-NEXT:    vrgather.vx v9, v8, a0
+; RV64-NO-ZFHMIN-NEXT:    vmv1r.v v8, v9
+; RV64-NO-ZFHMIN-NEXT:    ret
+;
+; RV32-ZFHMIN-LABEL: splat_idx_v4f16:
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topperc wrote:

I think this is caused by not handling extract_vector_elt causing it to expand through memory.

https://github.com/llvm/llvm-project/pull/106637