[llvm] [ExtendLifetimes] Implement llvm.fake.use to extend variable lifetimes (PR #86149)

[LLVM Continuous Integration via llvm-commits]

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `clang-aarch64-sve-vls` running on `linaro-g3-01` while building `llvm` at step 7 "ninja check 1".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/143/builds/1769

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 7 (ninja check 1) failure: stage 1 checked (failure)
******************** TEST 'LLVM :: CodeGen/X86/fake-use-vector2.ll' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
RUN: at line 1: /home/tcwg-buildbot/worker/clang-aarch64-sve-vls/stage1/bin/llc -stop-after=finalize-isel -filetype=asm -o - /home/tcwg-buildbot/worker/clang-aarch64-sve-vls/llvm/llvm/test/CodeGen/X86/fake-use-vector2.ll | /home/tcwg-buildbot/worker/clang-aarch64-sve-vls/stage1/bin/FileCheck /home/tcwg-buildbot/worker/clang-aarch64-sve-vls/llvm/llvm/test/CodeGen/X86/fake-use-vector2.ll
+ /home/tcwg-buildbot/worker/clang-aarch64-sve-vls/stage1/bin/FileCheck /home/tcwg-buildbot/worker/clang-aarch64-sve-vls/llvm/llvm/test/CodeGen/X86/fake-use-vector2.ll
+ /home/tcwg-buildbot/worker/clang-aarch64-sve-vls/stage1/bin/llc -stop-after=finalize-isel -filetype=asm -o - /home/tcwg-buildbot/worker/clang-aarch64-sve-vls/llvm/llvm/test/CodeGen/X86/fake-use-vector2.ll
'btver2' is not a recognized processor for this target (ignoring processor)
'btver2' is not a recognized processor for this target (ignoring processor)
'btver2' is not a recognized processor for this target (ignoring processor)
'btver2' is not a recognized processor for this target (ignoring processor)
/home/tcwg-buildbot/worker/clang-aarch64-sve-vls/llvm/llvm/test/CodeGen/X86/fake-use-vector2.ll:14:10: error: CHECK: expected string not found in input
; CHECK: %0:vr256 = VMOV
         ^
<stdin>:1:1: note: scanning from here
--- |
^
<stdin>:89:2: note: possible intended match here
 %1:gpr32 = MOVi32imm 1
 ^

Input file: <stdin>
Check file: /home/tcwg-buildbot/worker/clang-aarch64-sve-vls/llvm/llvm/test/CodeGen/X86/fake-use-vector2.ll

-dump-input=help explains the following input dump.

Input was:
<<<<<<
            1: --- | 
check:14'0     X~~~~~ error: no match found
            2:  ; ModuleID = '/home/tcwg-buildbot/worker/clang-aarch64-sve-vls/llvm/llvm/test/CodeGen/X86/fake-use-vector2.ll' 
check:14'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            3:  source_filename = "t5.cpp" 
check:14'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            4:  target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32" 
check:14'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            5:   
check:14'0     ~~
            6:  ; Function Attrs: optdebug 
check:14'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            .
            .
            .
           84: machineFunctionInfo: {} 
check:14'0     ~~~~~~~~~~~~~~~~~~~~~~~~
           85: body: | 
check:14'0     ~~~~~~~~
           86:  bb.0.entry: 
check:14'0     ~~~~~~~~~~~~~
...

```

</details>

https://github.com/llvm/llvm-project/pull/86149