[compiler-rt] 2505546 - [compiler-rt][RISCV][NFC] Update code_model with latest spec (#106498)

[via llvm-commits]

Author: Piyou Chen
Date: 2024-08-29T17:55:27+08:00
New Revision: 2505546aee8b35d03d7755b0f8e6cd960295928e

URL: https://github.com/llvm/llvm-project/commit/2505546aee8b35d03d7755b0f8e6cd960295928e
DIFF: https://github.com/llvm/llvm-project/commit/2505546aee8b35d03d7755b0f8e6cd960295928e.diff

LOG: [compiler-rt][RISCV][NFC] Update code_model with latest spec (#106498)

The spec could be found here
https://github.com/riscv-non-isa/riscv-c-api-doc/pull/74

This patch updates the following symbol:

```
mVendorID -> mvendorid
mArchID -> marchid
mImplID -> mimpid
```

Added: 
    

Modified: 
    compiler-rt/lib/builtins/cpu_model/riscv.c

Removed: 
    


################################################################################
diff  --git a/compiler-rt/lib/builtins/cpu_model/riscv.c b/compiler-rt/lib/builtins/cpu_model/riscv.c
index 987812c18fa792..85b24ab8f43bc1 100644
--- a/compiler-rt/lib/builtins/cpu_model/riscv.c
+++ b/compiler-rt/lib/builtins/cpu_model/riscv.c
@@ -21,9 +21,9 @@ struct {
 } __riscv_vendor_feature_bits __attribute__((visibility("hidden"), nocommon));
 
 struct {
-  unsigned mVendorID;
-  unsigned mArchID;
-  unsigned mImplID;
+  unsigned mvendorid;
+  unsigned marchid;
+  unsigned mimpid;
 } __riscv_cpu_model __attribute__((visibility("hidden"), nocommon));
 
 // NOTE: Should sync-up with RISCVFeatures.td
@@ -250,9 +250,9 @@ static void initRISCVFeature(struct riscv_hwprobe Hwprobes[]) {
   // This unsets all extension bitmask bits.
 
   // Init VendorID, ArchID, ImplID
-  __riscv_cpu_model.mVendorID = Hwprobes[2].value;
-  __riscv_cpu_model.mArchID = Hwprobes[3].value;
-  __riscv_cpu_model.mImplID = Hwprobes[4].value;
+  __riscv_cpu_model.mvendorid = Hwprobes[2].value;
+  __riscv_cpu_model.marchid = Hwprobes[3].value;
+  __riscv_cpu_model.mimpid = Hwprobes[4].value;
 
   // Init standard extension
   // TODO: Maybe Extension implied generate from tablegen?