[llvm] [X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (PR #106370)

[Pawan Nirpal via llvm-commits]

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@@ -1275,6 +1275,56 @@ void SelectionDAGLegalize::LegalizeOp(SDNode *Node) {
       }
     }
     break;
+    case ISD::FCANONICALIZE: {
+      const Triple &TT = DAG.getTarget().getTargetTriple();
+      if (TT.getArch() == Triple::x86 || TT.getArch() == Triple::x86_64) {
----------------
pawan-nirpal-031 wrote:

Regarding the reason I guarded this with the arch check, is that, I originally Intended to do all this code in X86IselDagToDag, But when handling subnormal cases in selection phase I would run into all sorts of crashes and It became apparent that handling subnormal cases prior to selection is what I had to do.

 About the root cause of the crashes itself, when I would try to generate a load of zero from constant pool for a positive denormal for example ( in case of preserve-sign denormal mode ) it would generate mal-formed/illegal mir/dag node, take a look at the below example 

```
Correct /Expected
    t9: f32,ch = VMOVSSZrm_alt<Mem:(load (s32) from constant-pool)> Register:i64 $rip, TargetConstant:i8<1>, Register:i64 $noreg, TargetConstantPool:i32<float -1.000000e+00> 0, Register:i16 $noreg, t0
 
 Generated 
t19: f32,ch = VMOVSSZrm_alt<Mem:(load (s32) from constant-pool)> ConstantPool:i64<float -0.000000e+00> 0, TargetConstant:i8<1>, Register:i64 $noreg, TargetConstant:i32<0>, Register:i16 $noreg, t0

Root cause [ Register:i64 $rip ] not selected still the constant pool entry exists ConstantPool:i64<float -0.000000e+00> 0

```
As you can see the register operand rip, was not selected and the constant pool reference still existed post instruction selection, till code emission. Resulting in crash, and rightly so. 

About the guard itself, when I tested this same code without any arch guard I saw a test case in amdgpu was crashing named ```clamp.ll``` to prevent that I had to resort to adding this guard. 

https://github.com/llvm/llvm-project/pull/106370