[llvm] BPF: Generate locked insn for __sync_fetch_and_add() with cpu v1/v2 (PR #106494)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 28 22:40:52 PDT 2024
github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code. :warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff 438ad9f2bf25575c474313de4ad85a5da6f69e4c d7d335faccc4a15fd833b053897d94acb2c8266b --extensions h,cpp -- llvm/lib/Target/BPF/BPFMIChecking.cpp llvm/lib/Target/BPF/BPF.h llvm/lib/Target/BPF/BPFTargetMachine.cpp
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/Target/BPF/BPF.h b/llvm/lib/Target/BPF/BPF.h
index 694d7bacf6..f07ae4c9ba 100644
--- a/llvm/lib/Target/BPF/BPF.h
+++ b/llvm/lib/Target/BPF/BPF.h
@@ -37,7 +37,7 @@ InstructionSelector *createBPFInstructionSelector(const BPFTargetMachine &,
void initializeBPFCheckAndAdjustIRPass(PassRegistry&);
void initializeBPFDAGToDAGISelLegacyPass(PassRegistry &);
void initializeBPFMIPeepholePass(PassRegistry &);
-void initializeBPFMIPreEmitCheckingPass(PassRegistry&);
+void initializeBPFMIPreEmitCheckingPass(PassRegistry &);
void initializeBPFMIPreEmitPeepholePass(PassRegistry &);
void initializeBPFMISimplifyPatchablePass(PassRegistry &);
diff --git a/llvm/lib/Target/BPF/BPFMIChecking.cpp b/llvm/lib/Target/BPF/BPFMIChecking.cpp
index 22ca221820..24224f6c1e 100644
--- a/llvm/lib/Target/BPF/BPFMIChecking.cpp
+++ b/llvm/lib/Target/BPF/BPFMIChecking.cpp
@@ -46,7 +46,6 @@ private:
void processAtomicInsts();
public:
-
// Main entry point for this pass.
bool runOnMachineFunction(MachineFunction &MF) override {
if (!skipFunction(MF.getFunction())) {
@@ -107,7 +106,7 @@ void BPFMIPreEmitChecking::initialize(MachineFunction &MFParm) {
// Dead correctly, and it is safe to use such information or our purpose.
static bool hasLiveDefs(const MachineInstr &MI, const TargetRegisterInfo *TRI) {
const MCRegisterClass *GPR64RegClass =
- &BPFMCRegisterClasses[BPF::GPRRegClassID];
+ &BPFMCRegisterClasses[BPF::GPRRegClassID];
std::vector<unsigned> GPR32LiveDefs;
std::vector<unsigned> GPR64DeadDefs;
@@ -156,8 +155,7 @@ static bool hasLiveDefs(const MachineInstr &MI, const TargetRegisterInfo *TRI) {
void BPFMIPreEmitChecking::processAtomicInsts() {
for (MachineBasicBlock &MBB : *MF) {
for (MachineInstr &MI : MBB) {
- if (MI.getOpcode() != BPF::XADDW &&
- MI.getOpcode() != BPF::XADDD)
+ if (MI.getOpcode() != BPF::XADDW && MI.getOpcode() != BPF::XADDD)
continue;
LLVM_DEBUG(MI.dump());
@@ -172,13 +170,12 @@ void BPFMIPreEmitChecking::processAtomicInsts() {
}
}
-} // end default namespace
+} // namespace
INITIALIZE_PASS(BPFMIPreEmitChecking, "bpf-mi-pemit-checking",
"BPF PreEmit Checking", false, false)
char BPFMIPreEmitChecking::ID = 0;
-FunctionPass* llvm::createBPFMIPreEmitCheckingPass()
-{
+FunctionPass *llvm::createBPFMIPreEmitCheckingPass() {
return new BPFMIPreEmitChecking();
}
``````````
</details>
https://github.com/llvm/llvm-project/pull/106494
More information about the llvm-commits
mailing list