[clang] [llvm] [AArch64] Implement intrinsics for SVE FAMIN/FAMAX (PR #99042)

[Momchil Velikov via llvm-commits]

================
@@ -135,6 +135,8 @@ enum NodeType : unsigned {
   UDIV_PRED,
   UMAX_PRED,
   UMIN_PRED,
+  FAMAX_PRED,
+  FAMIN_PRED,
----------------
momchil-velikov wrote:

How about:
```
  case Intrinsic::aarch64_sve_fmin_u:
    return DAG.getNode(AArch64ISD::FMIN_PRED, SDLoc(N), N->getValueType(0),
                       N->getOperand(1), N->getOperand(2), N->getOperand(3));
```

Should it also not use a custom ISD node? Or we use here it because we have it anyway? (for lowering `ISD::FMINIMUM` ?)

https://github.com/llvm/llvm-project/pull/99042