[llvm] [AArch64][GlobalISel] Lower G_BUILD_VECTOR to G_INSERT_VECTOR_ELT (PR #105686)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 28 05:54:35 PDT 2024
================
@@ -1054,6 +1054,40 @@ void applyLowerVectorFCMP(MachineInstr &MI, MachineRegisterInfo &MRI,
MI.eraseFromParent();
}
+// Matches G_BUILD_VECTOR where at least one source operand is not a constant
+bool matchLowerBuildToInsertVecElt(MachineInstr &MI, MachineRegisterInfo &MRI) {
+ auto *GBuildVec = dyn_cast<GBuildVector>(&MI);
+
+ // Check if the values are all constants
+ for (unsigned i = 0; i < GBuildVec->getNumSources(); i++) {
+ auto ConstVal =
+ getAnyConstantVRegValWithLookThrough(GBuildVec->getSourceReg(i), MRI);
+
+ if (!ConstVal.has_value())
+ return true;
+ }
+
+ return false;
+}
+
+void applyLowerBuildToInsertVecElt(MachineInstr &MI, MachineRegisterInfo &MRI,
+ MachineIRBuilder &B) {
+ auto *GBuildVec = cast<GBuildVector>(&MI);
+ LLT DstTy = MRI.getType(GBuildVec->getReg(0));
+ Register DstReg = B.buildUndef(DstTy).getReg(0);
+
+ for (unsigned i = 0; i < GBuildVec->getNumSources(); i++) {
+ Register SrcReg = GBuildVec->getSourceReg(i);
+ if (MRI.getVRegDef(SrcReg)->getOpcode() == TargetOpcode::G_IMPLICIT_DEF)
+ continue;
+ Register IdxReg = B.buildConstant(LLT::scalar(64), i).getReg(0);
----------------
arsenm wrote:
auto and remove .getReg(0)
https://github.com/llvm/llvm-project/pull/105686
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