[llvm] [ARM][CodeGen] Disable MEMCPY LDM/STM inlining for v7-m (PR #106378)

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``````````bash
git-clang-format --diff 95d2d1cba0e1428718bbdce0504292f62b212920 8398a523e1ee71d424ea8860be70f36756e2302e --extensions cpp,h -- llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp llvm/lib/Target/ARM/ARMSelectionDAGInfo.h llvm/lib/Target/ARM/ARMSubtarget.h
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp b/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
index a5abaf466a..964adef04d 100644
--- a/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
@@ -138,14 +138,10 @@ SDValue ARMSelectionDAGInfo::EmitSpecializedLibcall(
   return CallResult.second;
 }
 
-SDValue
-ARMSelectionDAGInfo::EmitMemcpyAsLdSt(SelectionDAG &DAG, SDLoc dl,
-                                      const ARMSubtarget &Subtarget,
-                                      SDValue Chain,
-                                      SDValue Dst, SDValue Src,
-                                      uint64_t SizeVal, bool isVolatile,
-                                      MachinePointerInfo DstPtrInfo,
-                                      MachinePointerInfo SrcPtrInfo) const {
+SDValue ARMSelectionDAGInfo::EmitMemcpyAsLdSt(
+    SelectionDAG &DAG, SDLoc dl, const ARMSubtarget &Subtarget, SDValue Chain,
+    SDValue Dst, SDValue Src, uint64_t SizeVal, bool isVolatile,
+    MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const {
   // Do repeated batches of 4-byte loads and stores.
   unsigned BytesLeft = SizeVal & 3;
   unsigned NumMemOps = SizeVal >> 2;
@@ -178,8 +174,7 @@ ARMSelectionDAGInfo::EmitMemcpyAsLdSt(SelectionDAG &DAG, SDLoc dl,
   // same number of stores.  The loads and stores may get combined into
   // ldm/stm later on.
   while (EmittedNumMemOps < NumMemOps) {
-    for (i = 0;
-         i < MaxLoads && EmittedNumMemOps + i < NumMemOps; ++i) {
+    for (i = 0; i < MaxLoads && EmittedNumMemOps + i < NumMemOps; ++i) {
       Loads[i] = DAG.getLoad(VT, dl, Chain,
                              DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
                                          DAG.getConstant(SrcOff, dl, MVT::i32)),
@@ -188,11 +183,9 @@ ARMSelectionDAGInfo::EmitMemcpyAsLdSt(SelectionDAG &DAG, SDLoc dl,
       TFOps[i] = Loads[i].getValue(1);
       SrcOff += VTSize;
     }
-    Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
-                        ArrayRef(TFOps, i));
+    Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, ArrayRef(TFOps, i));
 
-    for (i = 0;
-         i < MaxLoads && EmittedNumMemOps + i < NumMemOps; ++i) {
+    for (i = 0; i < MaxLoads && EmittedNumMemOps + i < NumMemOps; ++i) {
       TFOps[i] = DAG.getStore(
           Chain, dl, Loads[i],
           DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
@@ -200,8 +193,7 @@ ARMSelectionDAGInfo::EmitMemcpyAsLdSt(SelectionDAG &DAG, SDLoc dl,
           DstPtrInfo.getWithOffset(DstOff), MaybeAlign(0), StoreMOFlags);
       DstOff += VTSize;
     }
-    Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
-                        ArrayRef(TFOps, i));
+    Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, ArrayRef(TFOps, i));
 
     EmittedNumMemOps += i;
   }
@@ -231,8 +223,7 @@ ARMSelectionDAGInfo::EmitMemcpyAsLdSt(SelectionDAG &DAG, SDLoc dl,
     SrcOff += VTSize;
     BytesLeft -= VTSize;
   }
-  Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
-                      ArrayRef(TFOps, i));
+  Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, ArrayRef(TFOps, i));
 
   i = 0;
   BytesLeft = BytesLeftSave;
@@ -254,8 +245,7 @@ ARMSelectionDAGInfo::EmitMemcpyAsLdSt(SelectionDAG &DAG, SDLoc dl,
     DstOff += VTSize;
     BytesLeft -= VTSize;
   }
-  return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
-                     ArrayRef(TFOps, i));
+  return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, ArrayRef(TFOps, i));
 }
 
 static bool shouldGenerateInlineTPLoop(const ARMSubtarget &Subtarget,
diff --git a/llvm/lib/Target/ARM/ARMSelectionDAGInfo.h b/llvm/lib/Target/ARM/ARMSelectionDAGInfo.h
index 64d6439779..6ff422c15b 100644
--- a/llvm/lib/Target/ARM/ARMSelectionDAGInfo.h
+++ b/llvm/lib/Target/ARM/ARMSelectionDAGInfo.h
@@ -45,11 +45,9 @@ public:
                                   MachinePointerInfo SrcPtrInfo) const override;
 
   SDValue EmitMemcpyAsLdSt(SelectionDAG &DAG, SDLoc dl,
-                           const ARMSubtarget &Subtarget,
-                           SDValue Chain,
-                           SDValue Dst, SDValue Src,
-                           uint64_t SizeVal, bool isVolatile,
-                           MachinePointerInfo DstPtrInfo,
+                           const ARMSubtarget &Subtarget, SDValue Chain,
+                           SDValue Dst, SDValue Src, uint64_t SizeVal,
+                           bool isVolatile, MachinePointerInfo DstPtrInfo,
                            MachinePointerInfo SrcPtrInfo) const;
 
   SDValue
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h
index 066cc1cf85..4ae1175a2f 100644
--- a/llvm/lib/Target/ARM/ARMSubtarget.h
+++ b/llvm/lib/Target/ARM/ARMSubtarget.h
@@ -467,9 +467,7 @@ public:
 
   /// True if ARMISD::MEMCPY should not be created/expanded specially (e.g.
   /// as LDM/STM pairs).
-  bool wantsMEMCPYAsLdSt() const {
-    return HasV7Ops && ARMProcClass == MClass;
-  }
+  bool wantsMEMCPYAsLdSt() const { return HasV7Ops && ARMProcClass == MClass; }
 
   /// Returns the correct return opcode for the current feature set.
   /// Use BX if available to allow mixing thumb/arm code, but fall back

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https://github.com/llvm/llvm-project/pull/106378