[llvm] [VPlan][NFC] Add cost for `VPWidenMemoryRecipe`. (PR #105614)
Shih-Po Hung via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 27 22:45:00 PDT 2024
================
@@ -2079,6 +2079,46 @@ void VPPredInstPHIRecipe::print(raw_ostream &O, const Twine &Indent,
}
#endif
+InstructionCost VPWidenMemoryRecipe::computeCost(ElementCount VF,
+ VPCostContext &Ctx) const {
+ Type *Ty = ToVectorTy(getLoadStoreType(&Ingredient), VF);
+ const Align Alignment =
+ getLoadStoreAlignment(const_cast<Instruction *>(&Ingredient));
+ unsigned AS =
+ getLoadStoreAddressSpace(const_cast<Instruction *>(&Ingredient));
+ TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput;
+
+ if (!Consecutive) {
+ // TODO: Using the original IR may not be accurate.
+ // Currently, ARM will use the underlying IR to calculate gather/scatter
+ // instruction cost.
+ const Value *Ptr = getLoadStorePointerOperand(&Ingredient);
+ assert(!Reverse &&
+ "Inconsecutive memory access should not have the order.");
+ return Ctx.TTI.getAddressComputationCost(Ty) +
+ Ctx.TTI.getGatherScatterOpCost(Ingredient.getOpcode(), Ty, Ptr,
+ IsMasked, Alignment, CostKind,
+ &Ingredient);
+ }
+
+ InstructionCost Cost = 0;
+ if (IsMasked) {
+ Cost += Ctx.TTI.getMaskedMemoryOpCost(Ingredient.getOpcode(), Ty, Alignment,
+ AS, CostKind);
+ } else {
+ TTI::OperandValueInfo OpInfo =
+ Ctx.TTI.getOperandInfo(Ingredient.getOperand(0));
+ Cost += Ctx.TTI.getMemoryOpCost(Ingredient.getOpcode(), Ty, Alignment, AS,
+ CostKind, OpInfo, &Ingredient);
+ }
+ if (!Reverse)
+ return Cost;
+
+ return Cost += Ctx.TTI.getShuffleCost(TargetTransformInfo::SK_Reverse,
+ cast<VectorType>(Ty), std::nullopt,
+ CostKind, 0);
----------------
arcbbb wrote:
not sure if this is still NFC but we can skip the shuffle cost if it is a store and the store value is uniform
https://github.com/llvm/llvm-project/pull/105614
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