[llvm] [AMDGPU] Add MachineVerifer check to detect illegal copies from vector register to SGPR (PR #105494)

[Aditi Medhane via llvm-commits]

================
@@ -4613,15 +4613,45 @@ static bool isSubRegOf(const SIRegisterInfo &TRI,
          SubReg.getReg() == SuperVec.getReg();
 }
 
+// Verify the illegal copy from VGPR to SGPR for generic opcode COPY
+bool SIInstrInfo::verifyCopy(const MachineInstr &MI,
+                             const MachineRegisterInfo &MRI,
+                             StringRef &ErrInfo) const {
+  const MachineOperand &Dst = MI.getOperand(0);
+  const MachineOperand &Src = MI.getOperand(1);
+
+  Register DstReg = Dst.getReg();
+  Register SrcReg = Src.getReg();
----------------
AditiRM wrote:

Done

https://github.com/llvm/llvm-project/pull/105494