[llvm] [AMDGPU] Use range-based for loops (NFC) (PR #106328)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 27 19:44:59 PDT 2024
https://github.com/kazutakahirata created https://github.com/llvm/llvm-project/pull/106328
None
>From d156224753d4568e1091ba8cbeaadbb24165493b Mon Sep 17 00:00:00 2001
From: Kazu Hirata <kazu at google.com>
Date: Tue, 27 Aug 2024 16:03:08 -0700
Subject: [PATCH] [AMDGPU] Use range-based for loops (NFC)
---
llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 18 +++++-------------
1 file changed, 5 insertions(+), 13 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp b/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
index d826ae8c5da23a..268cd88584d215 100644
--- a/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
@@ -75,12 +75,9 @@ void R600InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
/// \returns true if \p MBBI can be moved into a new basic.
bool R600InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI) const {
- for (MachineInstr::const_mop_iterator I = MBBI->operands_begin(),
- E = MBBI->operands_end(); I != E; ++I) {
- if (I->isReg() && !I->getReg().isVirtual() && I->isUse() &&
- RI.isPhysRegLiveAcrossClauses(I->getReg()))
+ for (const MachineOperand &MO : MBBI->all_uses())
+ if (!MO.getReg().isVirtual() && RI.isPhysRegLiveAcrossClauses(MO.getReg()))
return false;
- }
return true;
}
@@ -219,15 +216,10 @@ bool R600InstrInfo::readsLDSSrcReg(const MachineInstr &MI) const {
if (!isALUInstr(MI.getOpcode())) {
return false;
}
- for (MachineInstr::const_mop_iterator I = MI.operands_begin(),
- E = MI.operands_end();
- I != E; ++I) {
- if (!I->isReg() || !I->isUse() || I->getReg().isVirtual())
- continue;
-
- if (R600::R600_LDS_SRC_REGRegClass.contains(I->getReg()))
+ for (const MachineOperand &MO : MI.all_uses())
+ if (!MO.getReg().isVirtual() &&
+ R600::R600_LDS_SRC_REGRegClass.contains(MO.getReg()))
return true;
- }
return false;
}
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