[llvm] edbd9d1 - [X86] Check if there is stack access in the spilled FP/BP range (#106035)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 27 12:26:38 PDT 2024
Author: weiguozhi
Date: 2024-08-27T12:26:34-07:00
New Revision: edbd9d10bfb2c716fd8c38133f4a20ca7138fc90
URL: https://github.com/llvm/llvm-project/commit/edbd9d10bfb2c716fd8c38133f4a20ca7138fc90
DIFF: https://github.com/llvm/llvm-project/commit/edbd9d10bfb2c716fd8c38133f4a20ca7138fc90.diff
LOG: [X86] Check if there is stack access in the spilled FP/BP range (#106035)
In the clobbered FP/BP range, we can't use it as normal FP/BP to access
stack. So if there are stack accesses due to register spill, scheduling
or other back end optimization, we should report an error instead of
silently generate wrong code.
Also try to minimize the save/restore range of the clobbered FP/BP if
the FrameSetup doesn't change stack size.
Added:
llvm/test/CodeGen/X86/clobber_frame_ptr2.ll
Modified:
llvm/lib/Target/X86/X86FrameLowering.cpp
llvm/lib/Target/X86/X86FrameLowering.h
llvm/test/CodeGen/X86/avx512-intel-ocl.ll
llvm/test/CodeGen/X86/clobber_frame_ptr.ll
llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index 8404f2231680d6..43a3219f789c4a 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -4430,6 +4430,33 @@ static bool isInvoke(const MachineInstr &MI, bool InsideEHLabels) {
return true;
}
+/// Given the live range of FP or BP (DefMI, KillMI), check if there is any
+/// interfered stack access in the range, usually generated by register spill.
+void X86FrameLowering::checkInterferedAccess(
+ MachineFunction &MF, MachineBasicBlock::reverse_iterator DefMI,
+ MachineBasicBlock::reverse_iterator KillMI, bool SpillFP,
+ bool SpillBP) const {
+ if (DefMI == KillMI)
+ return;
+ if (TRI->hasBasePointer(MF)) {
+ if (!SpillBP)
+ return;
+ } else {
+ if (!SpillFP)
+ return;
+ }
+
+ auto MI = KillMI;
+ while (MI != DefMI) {
+ if (any_of(MI->operands(),
+ [](const MachineOperand &MO) { return MO.isFI(); }))
+ MF.getContext().reportError(SMLoc(),
+ "Interference usage of base pointer/frame "
+ "pointer.");
+ MI++;
+ }
+}
+
/// If a function uses base pointer and the base pointer is clobbered by inline
/// asm, RA doesn't detect this case, and after the inline asm, the base pointer
/// contains garbage value.
@@ -4533,7 +4560,6 @@ void X86FrameLowering::spillFPBP(MachineFunction &MF) const {
// If the bp is clobbered by a call, we should save and restore outside of
// the frame setup instructions.
if (KillMI->isCall() && DefMI != ME) {
- const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
auto FrameSetup = std::next(DefMI);
// Look for frame setup instruction toward the start of the BB.
// If we reach another call instruction, it means no frame setup
@@ -4543,7 +4569,9 @@ void X86FrameLowering::spillFPBP(MachineFunction &MF) const {
++FrameSetup;
// If a frame setup instruction is found, we need to find out the
// corresponding frame destroy instruction.
- if (FrameSetup != ME && TII.isFrameSetup(*FrameSetup)) {
+ if (FrameSetup != ME && TII.isFrameSetup(*FrameSetup) &&
+ (TII.getFrameSize(*FrameSetup) ||
+ TII.getFrameAdjustment(*FrameSetup))) {
while (!TII.isFrameInstr(*KillMI))
--KillMI;
DefMI = FrameSetup;
@@ -4552,6 +4580,8 @@ void X86FrameLowering::spillFPBP(MachineFunction &MF) const {
}
}
+ checkInterferedAccess(MF, DefMI, KillMI, SpillFP, SpillBP);
+
// Call target function to spill and restore FP and BP registers.
saveAndRestoreFPBPUsingSP(MF, &(*DefMI), &(*KillMI), SpillFP, SpillBP);
}
diff --git a/llvm/lib/Target/X86/X86FrameLowering.h b/llvm/lib/Target/X86/X86FrameLowering.h
index e21f6ab3d16d5f..78217911dacadf 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.h
+++ b/llvm/lib/Target/X86/X86FrameLowering.h
@@ -287,6 +287,11 @@ class X86FrameLowering : public TargetFrameLowering {
MachineBasicBlock::iterator AfterMI,
bool SpillFP, bool SpillBP) const;
+ void checkInterferedAccess(MachineFunction &MF,
+ MachineBasicBlock::reverse_iterator DefMI,
+ MachineBasicBlock::reverse_iterator KillMI,
+ bool SpillFP, bool SpillBP) const;
+
// If MI uses fp/bp, but target can handle it, and doesn't want to be spilled
// again, this function should return true, and update MI so we will not check
// any instructions from related sequence.
diff --git a/llvm/test/CodeGen/X86/avx512-intel-ocl.ll b/llvm/test/CodeGen/X86/avx512-intel-ocl.ll
index 78870278eeace9..6c68279b8d04ae 100644
--- a/llvm/test/CodeGen/X86/avx512-intel-ocl.ll
+++ b/llvm/test/CodeGen/X86/avx512-intel-ocl.ll
@@ -69,9 +69,9 @@ define <16 x float> @testf16_inp(<16 x float> %a, <16 x float> %b) nounwind {
; X64-NEXT: andq $-64, %rsp
; X64-NEXT: subq $128, %rsp
; X64-NEXT: vaddps %zmm1, %zmm0, %zmm0
+; X64-NEXT: movq %rsp, %rdi
; X64-NEXT: pushq %rbp
; X64-NEXT: pushq %rax
-; X64-NEXT: movq %rsp, %rdi
; X64-NEXT: callq _func_float16_ptr
; X64-NEXT: addq $8, %rsp
; X64-NEXT: popq %rbp
@@ -153,9 +153,9 @@ define <16 x float> @testf16_regs(<16 x float> %a, <16 x float> %b) nounwind {
; X64-NEXT: subq $128, %rsp
; X64-NEXT: vmovaps %zmm1, %zmm16
; X64-NEXT: vaddps %zmm1, %zmm0, %zmm0
+; X64-NEXT: movq %rsp, %rdi
; X64-NEXT: pushq %rbp
; X64-NEXT: pushq %rax
-; X64-NEXT: movq %rsp, %rdi
; X64-NEXT: callq _func_float16_ptr
; X64-NEXT: addq $8, %rsp
; X64-NEXT: popq %rbp
diff --git a/llvm/test/CodeGen/X86/clobber_frame_ptr.ll b/llvm/test/CodeGen/X86/clobber_frame_ptr.ll
index fd8ba7feb9f48f..55c2d791b66e76 100644
--- a/llvm/test/CodeGen/X86/clobber_frame_ptr.ll
+++ b/llvm/test/CodeGen/X86/clobber_frame_ptr.ll
@@ -102,62 +102,6 @@ define i64 @test2(i64 %a0, i64 %a1) {
ret i64 %x
}
-; Test with more arguments, so some of them are passed from stack. The spilling
-; of rbp should not disturb stack arguments.
-; fixme: current generated code is wrong because rbp is used to load passed in
-; argument after rbp is assigned argument for function call, it is caused
-; by x86-cf-opt.
-define i64 @test3(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7) {
-; CHECK-LABEL: test3:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushq %rbp
-; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: .cfi_offset %rbp, -16
-; CHECK-NEXT: movq %rsp, %rbp
-; CHECK-NEXT: .cfi_def_cfa_register %rbp
-; CHECK-NEXT: pushq %r15
-; CHECK-NEXT: pushq %r14
-; CHECK-NEXT: pushq %r13
-; CHECK-NEXT: pushq %r12
-; CHECK-NEXT: pushq %rbx
-; CHECK-NEXT: andq $-16, %rsp
-; CHECK-NEXT: subq $16, %rsp
-; CHECK-NEXT: .cfi_offset %rbx, -56
-; CHECK-NEXT: .cfi_offset %r12, -48
-; CHECK-NEXT: .cfi_offset %r13, -40
-; CHECK-NEXT: .cfi_offset %r14, -32
-; CHECK-NEXT: .cfi_offset %r15, -24
-; CHECK-NEXT: pushq %rbp
-; CHECK-NEXT: pushq %rax
-; CHECK-NEXT: .cfi_remember_state
-; CHECK-NEXT: .cfi_escape 0x0f, 0x06, 0x77, 0x08, 0x06, 0x11, 0x10, 0x22 #
-; CHECK-NEXT: movq %rsi, %rbp
-; CHECK-NEXT: movq %rdi, %r15
-; CHECK-NEXT: movq %rdx, %rsi
-; CHECK-NEXT: movq %rcx, %rdx
-; CHECK-NEXT: movq %r8, %rcx
-; CHECK-NEXT: movq %r9, %r8
-; CHECK-NEXT: pushq 24(%rbp)
-; CHECK-NEXT: pushq 16(%rbp)
-; CHECK-NEXT: callq hipe2 at PLT
-; CHECK-NEXT: addq $8, %rsp
-; CHECK-NEXT: popq %rbp
-; CHECK-NEXT: .cfi_restore_state
-; CHECK-NEXT: addq $16, %rsp
-; CHECK-NEXT: movq %r15, %rax
-; CHECK-NEXT: leaq -40(%rbp), %rsp
-; CHECK-NEXT: popq %rbx
-; CHECK-NEXT: popq %r12
-; CHECK-NEXT: popq %r13
-; CHECK-NEXT: popq %r14
-; CHECK-NEXT: popq %r15
-; CHECK-NEXT: popq %rbp
-; CHECK-NEXT: .cfi_def_cfa %rsp, 8
-; CHECK-NEXT: retq
- %x = call cc 11 i64 @hipe2(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7)
- ret i64 %x
-}
-
@buf = dso_local global [20 x ptr] zeroinitializer, align 16
; longjmp modifies fp, it is expected behavior, wo should not save/restore fp
@@ -182,11 +126,11 @@ define void @test4() {
; CHECK-NEXT: .cfi_offset %r13, -40
; CHECK-NEXT: .cfi_offset %r14, -32
; CHECK-NEXT: .cfi_offset %r15, -24
+; CHECK-NEXT: xorl %r13d, %r13d
; CHECK-NEXT: pushq %rbp
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_remember_state
; CHECK-NEXT: .cfi_escape 0x0f, 0x06, 0x77, 0x08, 0x06, 0x11, 0x10, 0x22 #
-; CHECK-NEXT: xorl %r13d, %r13d
; CHECK-NEXT: callq external at PLT
; CHECK-NEXT: addq $8, %rsp
; CHECK-NEXT: popq %rbp
diff --git a/llvm/test/CodeGen/X86/clobber_frame_ptr2.ll b/llvm/test/CodeGen/X86/clobber_frame_ptr2.ll
new file mode 100644
index 00000000000000..0551152a0718d7
--- /dev/null
+++ b/llvm/test/CodeGen/X86/clobber_frame_ptr2.ll
@@ -0,0 +1,16 @@
+; RUN: not llc -mtriple=x86_64-pc-linux -stackrealign -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
+
+declare cc 11 i64 @hipe2(i64, i64, i64, i64, i64, i64, i64)
+
+; Test with many arguments, so some of them are passed from stack. The spilling
+; of rbp should not disturb stack arguments.
+; fixme: current generated code is wrong because rbp is used to load passed in
+; argument after rbp is assigned argument for function call, it is caused
+; by x86-cf-opt.
+
+; CHECK: <unknown>:0: error: Interference usage of base pointer/frame pointer.
+; CHECK: <unknown>:0: error: Interference usage of base pointer/frame pointer.
+define i64 @test3(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7) {
+ %x = call cc 11 i64 @hipe2(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7)
+ ret i64 %x
+}
diff --git a/llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll b/llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll
index b4c18dd7f4573e..e3bc77d4d5fa28 100644
--- a/llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll
@@ -62,18 +62,13 @@ define i64 @read_flags_reg_pressure() nounwind {
; CHECK-NEXT: pushq %r13
; CHECK-NEXT: pushq %r12
; CHECK-NEXT: pushq %rbx
-; CHECK-NEXT: subq $16, %rsp
; CHECK-NEXT: #APP
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: movq %rdx, (%rsp) # 8-byte Spill
; CHECK-NEXT: pushfq
-; CHECK-NEXT: popq %rdx
-; CHECK-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
-; CHECK-NEXT: movq (%rsp), %rdx # 8-byte Reload
+; CHECK-NEXT: popq %rbp
; CHECK-NEXT: #APP
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
-; CHECK-NEXT: addq $16, %rsp
+; CHECK-NEXT: movq %rbp, %rax
; CHECK-NEXT: popq %rbx
; CHECK-NEXT: popq %r12
; CHECK-NEXT: popq %r13
@@ -94,8 +89,6 @@ define i64 @read_flags_reg_pressure() nounwind {
; WIN64-NEXT: pushq %rbx
; WIN64-NEXT: subq $16, %rsp
; WIN64-NEXT: leaq {{[0-9]+}}(%rsp), %rbp
-; WIN64-NEXT: pushq %rbp
-; WIN64-NEXT: pushq %rax
; WIN64-NEXT: #APP
; WIN64-NEXT: #NO_APP
; WIN64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
@@ -105,8 +98,6 @@ define i64 @read_flags_reg_pressure() nounwind {
; WIN64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
; WIN64-NEXT: #APP
; WIN64-NEXT: #NO_APP
-; WIN64-NEXT: addq $8, %rsp
-; WIN64-NEXT: popq %rbp
; WIN64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; WIN64-NEXT: addq $16, %rsp
; WIN64-NEXT: popq %rbx
@@ -118,25 +109,24 @@ define i64 @read_flags_reg_pressure() nounwind {
; WIN64-NEXT: popq %r15
; WIN64-NEXT: popq %rbp
; WIN64-NEXT: retq
- %1 = tail call { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } asm sideeffect "", "={ax},={bx},={cx},={dx},={si},={di},={bp},={r8},={r9},={r10},={r11},={r12},={r13},={r14},={r15},~{dirflag},~{fpsr},~{flags}"()
- %2 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 0
- %3 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 1
- %4 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 2
- %5 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 3
- %6 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 4
- %7 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 5
- %8 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 6
- %9 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 7
- %10 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 8
- %11 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 9
- %12 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 10
- %13 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 11
- %14 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 12
- %15 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 13
- %16 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 14
- %17 = tail call i64 @llvm.x86.flags.read.u64()
- tail call void asm sideeffect "", "{ax},{bx},{cx},{dx},{si},{di},{bp},{r8},{r9},{r10},{r11},{r12},{r13},{r14},{r15},~{dirflag},~{fpsr},~{flags}"(i64 %2, i64 %3, i64 %4, i64 %5, i64 %6, i64 %7, i64 %8, i64 %9, i64 %10, i64 %11, i64 %12, i64 %13, i64 %14, i64 %15, i64 %16)
- ret i64 %17
+ %1 = tail call { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } asm sideeffect "", "={ax},={bx},={cx},={dx},={si},={di},={r8},={r9},={r10},={r11},={r12},={r13},={r14},={r15},~{dirflag},~{fpsr},~{flags}"()
+ %2 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 0
+ %3 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 1
+ %4 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 2
+ %5 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 3
+ %6 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 4
+ %7 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 5
+ %8 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 6
+ %9 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 7
+ %10 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 8
+ %11 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 9
+ %12 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 10
+ %13 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 11
+ %14 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 12
+ %15 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %1, 13
+ %flags = tail call i64 @llvm.x86.flags.read.u64()
+ tail call void asm sideeffect "", "{ax},{bx},{cx},{dx},{si},{di},{r8},{r9},{r10},{r11},{r12},{r13},{r14},{r15},~{dirflag},~{fpsr},~{flags}"(i64 %2, i64 %3, i64 %4, i64 %5, i64 %6, i64 %7, i64 %8, i64 %9, i64 %10, i64 %11, i64 %12, i64 %13, i64 %14, i64 %15)
+ ret i64 %flags
}
define void @write_flags_reg_pressure(i64 noundef %0) nounwind {
@@ -148,18 +138,13 @@ define void @write_flags_reg_pressure(i64 noundef %0) nounwind {
; CHECK-NEXT: pushq %r13
; CHECK-NEXT: pushq %r12
; CHECK-NEXT: pushq %rbx
-; CHECK-NEXT: subq $16, %rsp
-; CHECK-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: movq %rdi, %rbp
; CHECK-NEXT: #APP
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: movq %rdx, (%rsp) # 8-byte Spill
-; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
-; CHECK-NEXT: pushq %rdx
+; CHECK-NEXT: pushq %rbp
; CHECK-NEXT: popfq
-; CHECK-NEXT: movq (%rsp), %rdx # 8-byte Reload
; CHECK-NEXT: #APP
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: addq $16, %rsp
; CHECK-NEXT: popq %rbx
; CHECK-NEXT: popq %r12
; CHECK-NEXT: popq %r13
@@ -181,8 +166,6 @@ define void @write_flags_reg_pressure(i64 noundef %0) nounwind {
; WIN64-NEXT: subq $16, %rsp
; WIN64-NEXT: leaq {{[0-9]+}}(%rsp), %rbp
; WIN64-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
-; WIN64-NEXT: pushq %rbp
-; WIN64-NEXT: pushq %rax
; WIN64-NEXT: #APP
; WIN64-NEXT: #NO_APP
; WIN64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
@@ -192,8 +175,6 @@ define void @write_flags_reg_pressure(i64 noundef %0) nounwind {
; WIN64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
; WIN64-NEXT: #APP
; WIN64-NEXT: #NO_APP
-; WIN64-NEXT: popq %rax
-; WIN64-NEXT: popq %rbp
; WIN64-NEXT: addq $16, %rsp
; WIN64-NEXT: popq %rbx
; WIN64-NEXT: popq %rdi
@@ -204,23 +185,22 @@ define void @write_flags_reg_pressure(i64 noundef %0) nounwind {
; WIN64-NEXT: popq %r15
; WIN64-NEXT: popq %rbp
; WIN64-NEXT: retq
- %2 = tail call { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } asm sideeffect "", "={ax},={bx},={cx},={dx},={si},={di},={bp},={r8},={r9},={r10},={r11},={r12},={r13},={r14},={r15},~{dirflag},~{fpsr},~{flags}"()
- %3 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 0
- %4 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 1
- %5 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 2
- %6 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 3
- %7 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 4
- %8 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 5
- %9 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 6
- %10 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 7
- %11 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 8
- %12 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 9
- %13 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 10
- %14 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 11
- %15 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 12
- %16 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 13
- %17 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 14
+ %2 = tail call { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } asm sideeffect "", "={ax},={bx},={cx},={dx},={si},={di},={r8},={r9},={r10},={r11},={r12},={r13},={r14},={r15},~{dirflag},~{fpsr},~{flags}"()
+ %3 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 0
+ %4 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 1
+ %5 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 2
+ %6 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 3
+ %7 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 4
+ %8 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 5
+ %9 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 6
+ %10 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 7
+ %11 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 8
+ %12 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 9
+ %13 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 10
+ %14 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 11
+ %15 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 12
+ %16 = extractvalue { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 } %2, 13
tail call void @llvm.x86.flags.write.u64(i64 %0)
- tail call void asm sideeffect "", "{ax},{bx},{cx},{dx},{si},{di},{bp},{r8},{r9},{r10},{r11},{r12},{r13},{r14},{r15},~{dirflag},~{fpsr},~{flags}"(i64 %3, i64 %4, i64 %5, i64 %6, i64 %7, i64 %8, i64 %9, i64 %10, i64 %11, i64 %12, i64 %13, i64 %14, i64 %15, i64 %16, i64 %17)
+ tail call void asm sideeffect "", "{ax},{bx},{cx},{dx},{si},{di},{r8},{r9},{r10},{r11},{r12},{r13},{r14},{r15},~{dirflag},~{fpsr},~{flags}"(i64 %3, i64 %4, i64 %5, i64 %6, i64 %7, i64 %8, i64 %9, i64 %10, i64 %11, i64 %12, i64 %13, i64 %14, i64 %15, i64 %16)
ret void
}
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