[llvm] [AMDGPU] Add MachineVerifer check to detect illegal copies from VGPR to SGPR (PR #105494)
Christudasan Devadasan via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 27 04:17:15 PDT 2024
================
@@ -4613,15 +4613,45 @@ static bool isSubRegOf(const SIRegisterInfo &TRI,
SubReg.getReg() == SuperVec.getReg();
}
+// Verify the illegal copy from VGPR to SGPR for generic opcode COPY
+bool SIInstrInfo::verifyCopy(const MachineInstr &MI,
+ const MachineRegisterInfo &MRI,
+ StringRef &ErrInfo) const {
+ const MachineOperand &Dst = MI.getOperand(0);
+ const MachineOperand &Src = MI.getOperand(1);
+
+ Register DstReg = Dst.getReg();
+ Register SrcReg = Src.getReg();
+ // This is a check for copy from an VGPR to SGPR
+ if (RI.isVGPR(MRI, SrcReg) && RI.isSGPRReg(MRI, DstReg)) {
+ ErrInfo = "illegal copy from VGPR to SGPR";
+ return false;
+ }
+
+ // This is a check for copy from an AGPR to SGPR
+ if (RI.isAGPR(MRI, SrcReg) && RI.isSGPRReg(MRI, DstReg)) {
+ ErrInfo = "illegal copy from AGPR to SGPR";
+ return false;
+ }
----------------
cdevadas wrote:
I would prefer a single check with RI.isVectorRegister() that includes both VGPRs and AGPRs. Change the error message to "illegal copy from vector register to SGPR"
https://github.com/llvm/llvm-project/pull/105494
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