[llvm] 296ffc1 - [RISCV] Don't check hasStdExtZfh and hasStdExtZfhmin. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 26 17:20:10 PDT 2024
Author: Craig Topper
Date: 2024-08-26T17:20:04-07:00
New Revision: 296ffc1b38bdca05f468a62e29fe5b9f341ca68f
URL: https://github.com/llvm/llvm-project/commit/296ffc1b38bdca05f468a62e29fe5b9f341ca68f
DIFF: https://github.com/llvm/llvm-project/commit/296ffc1b38bdca05f468a62e29fe5b9f341ca68f.diff
LOG: [RISCV] Don't check hasStdExtZfh and hasStdExtZfhmin. NFC
hasStdExtZfh implies hasStdExtZfhmin so it is sufficient to check
only hasStdExtZfhmin.
Similar for Zhinx and Zhinxmin.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index f59c74f6ab045f..05df16363ae14c 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -19106,8 +19106,7 @@ bool RISCV::CC_RISCV_FastCC(const DataLayout &DL, RISCVABI::ABI ABI,
const RISCVSubtarget &Subtarget = TLI.getSubtarget();
- if (LocVT == MVT::f16 &&
- (Subtarget.hasStdExtZfh() || Subtarget.hasStdExtZfhmin())) {
+ if (LocVT == MVT::f16 && Subtarget.hasStdExtZfhmin()) {
static const MCPhysReg FPR16List[] = {
RISCV::F10_H, RISCV::F11_H, RISCV::F12_H, RISCV::F13_H, RISCV::F14_H,
RISCV::F15_H, RISCV::F16_H, RISCV::F17_H, RISCV::F0_H, RISCV::F1_H,
@@ -19144,8 +19143,7 @@ bool RISCV::CC_RISCV_FastCC(const DataLayout &DL, RISCVABI::ABI ABI,
}
// Check if there is an available GPR before hitting the stack.
- if ((LocVT == MVT::f16 &&
- (Subtarget.hasStdExtZhinx() || Subtarget.hasStdExtZhinxmin())) ||
+ if ((LocVT == MVT::f16 && Subtarget.hasStdExtZhinxmin()) ||
(LocVT == MVT::f32 && Subtarget.hasStdExtZfinx()) ||
(LocVT == MVT::f64 && Subtarget.is64Bit() &&
Subtarget.hasStdExtZdinx())) {
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