[llvm] 3b0a1ec - [SandboxIR] Implement PossiblyDisjointInst (#106148)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 26 14:58:35 PDT 2024
Author: vporpo
Date: 2024-08-26T14:58:32-07:00
New Revision: 3b0a1ecb99b59fbcc2e587771a6820edd454d10e
URL: https://github.com/llvm/llvm-project/commit/3b0a1ecb99b59fbcc2e587771a6820edd454d10e
DIFF: https://github.com/llvm/llvm-project/commit/3b0a1ecb99b59fbcc2e587771a6820edd454d10e.diff
LOG: [SandboxIR] Implement PossiblyDisjointInst (#106148)
This patch implements sandboxir::PossiblyDisjointInst mirroring
llvm::PossiblyDisjointInst.
Added:
Modified:
llvm/include/llvm/SandboxIR/SandboxIR.h
llvm/lib/SandboxIR/SandboxIR.cpp
llvm/unittests/SandboxIR/SandboxIRTest.cpp
llvm/unittests/SandboxIR/TrackerTest.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/SandboxIR/SandboxIR.h b/llvm/include/llvm/SandboxIR/SandboxIR.h
index d3bee26c3142c9..6f37f928d7614d 100644
--- a/llvm/include/llvm/SandboxIR/SandboxIR.h
+++ b/llvm/include/llvm/SandboxIR/SandboxIR.h
@@ -144,6 +144,7 @@ class CatchSwitchInst;
class SwitchInst;
class UnaryOperator;
class BinaryOperator;
+class PossiblyDisjointInst;
class AtomicRMWInst;
class AtomicCmpXchgInst;
@@ -2374,6 +2375,7 @@ class UnaryOperator : public UnaryInstruction {
};
class BinaryOperator : public SingleLLVMInstructionImpl<llvm::BinaryOperator> {
+protected:
static Opcode getBinOpOpcode(llvm::Instruction::BinaryOps BinOp) {
switch (BinOp) {
case llvm::Instruction::Add:
@@ -2453,6 +2455,22 @@ class BinaryOperator : public SingleLLVMInstructionImpl<llvm::BinaryOperator> {
void swapOperands() { swapOperandsInternal(0, 1); }
};
+/// An or instruction, which can be marked as "disjoint", indicating that the
+/// inputs don't have a 1 in the same bit position. Meaning this instruction
+/// can also be treated as an add.
+class PossiblyDisjointInst : public BinaryOperator {
+public:
+ void setIsDisjoint(bool B);
+ bool isDisjoint() const {
+ return cast<llvm::PossiblyDisjointInst>(Val)->isDisjoint();
+ }
+ /// For isa/dyn_cast.
+ static bool classof(const Value *From) {
+ return isa<Instruction>(From) &&
+ cast<Instruction>(From)->getOpcode() == Opcode::Or;
+ }
+};
+
class AtomicRMWInst : public SingleLLVMInstructionImpl<llvm::AtomicRMWInst> {
AtomicRMWInst(llvm::AtomicRMWInst *Atomic, Context &Ctx)
: SingleLLVMInstructionImpl(ClassID::AtomicRMW,
diff --git a/llvm/lib/SandboxIR/SandboxIR.cpp b/llvm/lib/SandboxIR/SandboxIR.cpp
index ccb95b26070446..2195e9f98b53b4 100644
--- a/llvm/lib/SandboxIR/SandboxIR.cpp
+++ b/llvm/lib/SandboxIR/SandboxIR.cpp
@@ -1730,6 +1730,14 @@ Value *BinaryOperator::createWithCopiedFlags(Instruction::Opcode Op, Value *LHS,
InsertAtEnd, Ctx, Name);
}
+void PossiblyDisjointInst::setIsDisjoint(bool B) {
+ Ctx.getTracker()
+ .emplaceIfTracking<GenericSetter<&PossiblyDisjointInst::isDisjoint,
+ &PossiblyDisjointInst::setIsDisjoint>>(
+ this);
+ cast<llvm::PossiblyDisjointInst>(Val)->setIsDisjoint(B);
+}
+
void AtomicRMWInst::setAlignment(Align Align) {
Ctx.getTracker()
.emplaceIfTracking<GenericSetter<&AtomicRMWInst::getAlign,
diff --git a/llvm/unittests/SandboxIR/SandboxIRTest.cpp b/llvm/unittests/SandboxIR/SandboxIRTest.cpp
index 5ab61bd36b9bb3..6afd5f9897a829 100644
--- a/llvm/unittests/SandboxIR/SandboxIRTest.cpp
+++ b/llvm/unittests/SandboxIR/SandboxIRTest.cpp
@@ -2961,6 +2961,31 @@ define void @foo(i8 %arg0, i8 %arg1, float %farg0, float %farg1) {
}
}
+TEST_F(SandboxIRTest, PossiblyDisjointInst) {
+ parseIR(C, R"IR(
+define void @foo(i8 %arg0, i8 %arg1) {
+ %or = or i8 %arg0, %arg1
+ ret void
+}
+)IR");
+ Function &LLVMF = *M->getFunction("foo");
+ sandboxir::Context Ctx(C);
+
+ auto &F = *Ctx.createFunction(&LLVMF);
+ auto *BB = &*F.begin();
+ auto It = BB->begin();
+ auto *PDI = cast<sandboxir::PossiblyDisjointInst>(&*It++);
+
+ // Check setIsDisjoint(), isDisjoint().
+ auto OrigIsDisjoint = PDI->isDisjoint();
+ auto NewIsDisjoint = true;
+ EXPECT_NE(NewIsDisjoint, OrigIsDisjoint);
+ PDI->setIsDisjoint(NewIsDisjoint);
+ EXPECT_EQ(PDI->isDisjoint(), NewIsDisjoint);
+ PDI->setIsDisjoint(OrigIsDisjoint);
+ EXPECT_EQ(PDI->isDisjoint(), OrigIsDisjoint);
+}
+
TEST_F(SandboxIRTest, AtomicRMWInst) {
parseIR(C, R"IR(
define void @foo(ptr %ptr, i8 %arg) {
diff --git a/llvm/unittests/SandboxIR/TrackerTest.cpp b/llvm/unittests/SandboxIR/TrackerTest.cpp
index a1059d6fa64274..1feb04137e129c 100644
--- a/llvm/unittests/SandboxIR/TrackerTest.cpp
+++ b/llvm/unittests/SandboxIR/TrackerTest.cpp
@@ -988,6 +988,32 @@ define void @foo(<2 x i8> %v1, <2 x i8> %v2) {
EXPECT_THAT(SVI->getShuffleMask(), testing::ElementsAreArray(OrigMask));
}
+TEST_F(TrackerTest, PossiblyDisjointInstSetters) {
+ parseIR(C, R"IR(
+define void @foo(i8 %arg0, i8 %arg1) {
+ %or = or i8 %arg0, %arg1
+ ret void
+}
+)IR");
+ Function &LLVMF = *M->getFunction("foo");
+ sandboxir::Context Ctx(C);
+
+ auto &F = *Ctx.createFunction(&LLVMF);
+ auto *BB = &*F.begin();
+ auto It = BB->begin();
+ auto *PDI = cast<sandboxir::PossiblyDisjointInst>(&*It++);
+
+ // Check setIsDisjoint().
+ auto OrigIsDisjoint = PDI->isDisjoint();
+ auto NewIsDisjoint = true;
+ EXPECT_NE(NewIsDisjoint, OrigIsDisjoint);
+ Ctx.save();
+ PDI->setIsDisjoint(NewIsDisjoint);
+ EXPECT_EQ(PDI->isDisjoint(), NewIsDisjoint);
+ Ctx.revert();
+ EXPECT_EQ(PDI->isDisjoint(), OrigIsDisjoint);
+}
+
TEST_F(TrackerTest, AtomicRMWSetters) {
parseIR(C, R"IR(
define void @foo(ptr %ptr, i8 %arg) {
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