[llvm] [AArch64][GlobalISel] Legalize 128-bit types for FABS (PR #104753)
David Green via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 26 14:15:06 PDT 2024
================
@@ -257,6 +257,20 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
.clampNumElements(0, v2s64, v2s64)
.moreElementsToNextPow2(0);
+ getActionDefinitionsBuilder(G_FABS)
+ .legalFor({MinFPScalar, s32, s64, v2s32, v4s32, v2s64})
+ .legalIf([=](const LegalityQuery &Query) {
+ const auto &Ty = Query.Types[0];
+ return (Ty == v8s16 || Ty == v4s16) && HasFP16;
+ })
+ .lowerFor({s128})
+ .scalarizeIf(scalarOrEltWiderThan(0, 64), 0)
----------------
davemgreen wrote:
I happened to be adding i128 support for add/sub recently, and and/or/xor was caught up in them. There might not be a lot of benefit at the moment choosing one method vs the other as we will just scalarize in either case. That could be improved in the future if we change how they lower.
https://github.com/llvm/llvm-project/pull/104753
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