[llvm] [InstCombine] Replace all dominated uses of condition with constants (PR #105510)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 26 10:13:58 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-transforms
Author: Yingwei Zheng (dtcxzyw)
<details>
<summary>Changes</summary>
This patch replaces all dominated uses of condition with true/false to improve context-sensitive optimizations. It eliminates a bunch of branches in llvm-opt-benchmark.
As a side effect, it may introduce new phi nodes in some corner cases. See the following case:
```
define i1 @<!-- -->test(i1 %cmp, i1 %cond) {
entry:
br i1 %cond, label %bb1, label %bb2
bb1:
br i1 %cmp, label %if.then, label %if.else
if.then:
br %bb2
if.else:
br %bb2
bb2:
%res = phi i1 [%cmp, %entry], [%cmp, %if.then], [%cmp, %if.else]
ret i1 %res
}
```
It will be simplified into:
```
define i1 @<!-- -->test(i1 %cmp, i1 %cond) {
entry:
br i1 %cond, label %bb1, label %bb2
bb1:
br i1 %cmp, label %if.then, label %if.else
if.then:
br %bb2
if.else:
br %bb2
bb2:
%res = phi i1 [%cmp, %entry], [true, %if.then], [false, %if.else]
ret i1 %res
}
```
I am planning to fix this in late pipeline/CGP since this problem exists before the patch.
---
Patch is 25.93 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/105510.diff
15 Files Affected:
- (modified) llvm/lib/Transforms/InstCombine/InstructionCombining.cpp (+14)
- (modified) llvm/test/Transforms/InstCombine/assume.ll (+3-3)
- (modified) llvm/test/Transforms/InstCombine/branch.ll (+96)
- (modified) llvm/test/Transforms/InstCombine/compare-unescaped.ll (+1-1)
- (modified) llvm/test/Transforms/InstCombine/icmp-dom.ll (+10-10)
- (modified) llvm/test/Transforms/InstCombine/indexed-gep-compares.ll (+1-1)
- (modified) llvm/test/Transforms/InstCombine/known-bits.ll (+2-4)
- (modified) llvm/test/Transforms/InstCombine/phi-known-bits-operand-order.ll (+4-8)
- (modified) llvm/test/Transforms/InstCombine/phi.ll (+8-8)
- (modified) llvm/test/Transforms/InstCombine/pr44245.ll (+10-22)
- (modified) llvm/test/Transforms/InstCombine/sink-into-ncd.ll (+2-2)
- (modified) llvm/test/Transforms/InstCombine/sink_to_unreachable.ll (+5-7)
- (modified) llvm/test/Transforms/InstCombine/zext-phi.ll (+1-1)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/uniform-args-call-variants.ll (+2-2)
- (modified) llvm/test/Transforms/PhaseOrdering/AArch64/constraint-elimination-placement.ll (+7-7)
``````````diff
diff --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
index 8a96d1d0fb4c90..6328241e35a5b2 100644
--- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
@@ -3705,6 +3705,20 @@ Instruction *InstCombinerImpl::visitBranchInst(BranchInst &BI) {
return nullptr;
}
+ // Replace all dominated uses of the condition with true/false
+ if (BI.getSuccessor(0) != BI.getSuccessor(1)) {
+ for (auto &U : make_early_inc_range(Cond->uses())) {
+ BasicBlockEdge Edge0(BI.getParent(), BI.getSuccessor(0));
+ if (DT.dominates(Edge0, U)) {
+ replaceUse(U, ConstantInt::getTrue(Cond->getType()));
+ continue;
+ }
+ BasicBlockEdge Edge1(BI.getParent(), BI.getSuccessor(1));
+ if (DT.dominates(Edge1, U))
+ replaceUse(U, ConstantInt::getFalse(Cond->getType()));
+ }
+ }
+
DC.registerBranch(&BI);
return nullptr;
}
diff --git a/llvm/test/Transforms/InstCombine/assume.ll b/llvm/test/Transforms/InstCombine/assume.ll
index 474da9968b66ad..a728c294628cad 100644
--- a/llvm/test/Transforms/InstCombine/assume.ll
+++ b/llvm/test/Transforms/InstCombine/assume.ll
@@ -485,7 +485,7 @@ define i1 @nonnull3B(ptr %a, i1 %control) {
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]]) [ "nonnull"(ptr [[LOAD]]) ]
; CHECK-NEXT: ret i1 [[CMP]]
; CHECK: not_taken:
-; CHECK-NEXT: ret i1 [[CONTROL]]
+; CHECK-NEXT: ret i1 false
;
entry:
%load = load ptr, ptr %a
@@ -513,7 +513,7 @@ define i1 @nonnull3C(ptr %a, i1 %control) {
; CHECK: exit:
; CHECK-NEXT: ret i1 [[CMP2]]
; CHECK: not_taken:
-; CHECK-NEXT: ret i1 [[CONTROL]]
+; CHECK-NEXT: ret i1 false
;
entry:
%load = load ptr, ptr %a
@@ -543,7 +543,7 @@ define i1 @nonnull3D(ptr %a, i1 %control) {
; CHECK: exit:
; CHECK-NEXT: ret i1 [[CMP2]]
; CHECK: not_taken:
-; CHECK-NEXT: ret i1 [[CONTROL]]
+; CHECK-NEXT: ret i1 false
;
entry:
%load = load ptr, ptr %a
diff --git a/llvm/test/Transforms/InstCombine/branch.ll b/llvm/test/Transforms/InstCombine/branch.ll
index 1110d5f90b1790..1d5ff72eef9ce6 100644
--- a/llvm/test/Transforms/InstCombine/branch.ll
+++ b/llvm/test/Transforms/InstCombine/branch.ll
@@ -242,3 +242,99 @@ t:
f:
ret i32 3
}
+
+define i32 @dom_true(i1 %cmp) {
+; CHECK-LABEL: @dom_true(
+; CHECK-NEXT: br i1 [[CMP:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: ret i32 1
+; CHECK: if.else:
+; CHECK-NEXT: ret i32 0
+;
+ br i1 %cmp, label %if.then, label %if.else
+
+if.then:
+ %zext = zext i1 %cmp to i32
+ ret i32 %zext
+
+if.else:
+ ret i32 0
+}
+
+define i32 @dom_false(i1 %cmp) {
+; CHECK-LABEL: @dom_false(
+; CHECK-NEXT: br i1 [[CMP:%.*]], label [[IF_ELSE:%.*]], label [[IF_THEN:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: ret i32 0
+; CHECK: if.else:
+; CHECK-NEXT: ret i32 0
+;
+ br i1 %cmp, label %if.else, label %if.then
+
+if.then:
+ %zext = zext i1 %cmp to i32
+ ret i32 %zext
+
+if.else:
+ ret i32 0
+}
+
+define i32 @dom_true_phi(i1 %cmp) {
+; CHECK-LABEL: @dom_true_phi(
+; CHECK-NEXT: br i1 [[CMP:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: br label [[IF_END:%.*]]
+; CHECK: if.else:
+; CHECK-NEXT: br label [[IF_END]]
+; CHECK: if.end:
+; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT: ret i32 [[ZEXT]]
+;
+ br i1 %cmp, label %if.then, label %if.else
+
+if.then:
+ br label %if.end
+
+if.else:
+ br label %if.end
+
+if.end:
+ %phi = phi i1 [ true, %if.then ], [ %cmp, %if.else ]
+ %zext = zext i1 %phi to i32
+ ret i32 %zext
+}
+
+; Negative tests
+
+define i32 @same_dest(i1 %cmp) {
+; CHECK-LABEL: @same_dest(
+; CHECK-NEXT: br i1 false, label [[IF_THEN:%.*]], label [[IF_THEN]]
+; CHECK: if.then:
+; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP:%.*]] to i32
+; CHECK-NEXT: ret i32 [[ZEXT]]
+;
+ br i1 %cmp, label %if.then, label %if.then
+
+if.then:
+ %zext = zext i1 %cmp to i32
+ ret i32 %zext
+}
+
+define i32 @not_dom(i1 %cmp) {
+; CHECK-LABEL: @not_dom(
+; CHECK-NEXT: br i1 [[CMP:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: br label [[IF_ELSE]]
+; CHECK: if.else:
+; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+; CHECK-NEXT: ret i32 [[ZEXT]]
+;
+ br i1 %cmp, label %if.then, label %if.else
+
+if.then:
+ br label %if.else
+
+if.else:
+ %zext = zext i1 %cmp to i32
+ ret i32 %zext
+}
diff --git a/llvm/test/Transforms/InstCombine/compare-unescaped.ll b/llvm/test/Transforms/InstCombine/compare-unescaped.ll
index ab380c00f82641..02eb464c814c81 100644
--- a/llvm/test/Transforms/InstCombine/compare-unescaped.ll
+++ b/llvm/test/Transforms/InstCombine/compare-unescaped.ll
@@ -86,7 +86,7 @@ define i1 @compare_and_call_after() {
; CHECK-NEXT: call void @escape(ptr [[M]])
; CHECK-NEXT: ret i1 true
; CHECK: just_return:
-; CHECK-NEXT: ret i1 [[CMP]]
+; CHECK-NEXT: ret i1 false
;
%m = call ptr @malloc(i64 24)
%lgp = load ptr, ptr @gp, align 8, !nonnull !0
diff --git a/llvm/test/Transforms/InstCombine/icmp-dom.ll b/llvm/test/Transforms/InstCombine/icmp-dom.ll
index 83cedd5ea9cb45..3cf3a7af77041c 100644
--- a/llvm/test/Transforms/InstCombine/icmp-dom.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-dom.ll
@@ -196,7 +196,7 @@ define i1 @trueblock_cmp_is_false(i32 %x, i32 %y) {
; CHECK: t:
; CHECK-NEXT: ret i1 false
; CHECK: f:
-; CHECK-NEXT: ret i1 [[CMP]]
+; CHECK-NEXT: ret i1 false
;
entry:
%cmp = icmp sgt i32 %x, %y
@@ -216,7 +216,7 @@ define i1 @trueblock_cmp_is_false_commute(i32 %x, i32 %y) {
; CHECK: t:
; CHECK-NEXT: ret i1 false
; CHECK: f:
-; CHECK-NEXT: ret i1 [[CMP]]
+; CHECK-NEXT: ret i1 false
;
entry:
%cmp = icmp eq i32 %x, %y
@@ -236,7 +236,7 @@ define i1 @trueblock_cmp_is_true(i32 %x, i32 %y) {
; CHECK: t:
; CHECK-NEXT: ret i1 true
; CHECK: f:
-; CHECK-NEXT: ret i1 [[CMP]]
+; CHECK-NEXT: ret i1 false
;
entry:
%cmp = icmp ult i32 %x, %y
@@ -256,7 +256,7 @@ define i1 @trueblock_cmp_is_true_commute(i32 %x, i32 %y) {
; CHECK: t:
; CHECK-NEXT: ret i1 true
; CHECK: f:
-; CHECK-NEXT: ret i1 [[CMP]]
+; CHECK-NEXT: ret i1 false
;
entry:
%cmp = icmp ugt i32 %x, %y
@@ -271,10 +271,10 @@ f:
define i1 @falseblock_cmp_is_false(i32 %x, i32 %y) {
; CHECK-LABEL: @falseblock_cmp_is_false(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: br i1 [[CMP]], label [[T:%.*]], label [[F:%.*]]
+; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[CMP_NOT]], label [[F:%.*]], label [[T:%.*]]
; CHECK: t:
-; CHECK-NEXT: ret i1 [[CMP]]
+; CHECK-NEXT: ret i1 true
; CHECK: f:
; CHECK-NEXT: ret i1 false
;
@@ -294,7 +294,7 @@ define i1 @falseblock_cmp_is_false_commute(i32 %x, i32 %y) {
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: br i1 [[CMP]], label [[T:%.*]], label [[F:%.*]]
; CHECK: t:
-; CHECK-NEXT: ret i1 [[CMP]]
+; CHECK-NEXT: ret i1 true
; CHECK: f:
; CHECK-NEXT: ret i1 false
;
@@ -314,7 +314,7 @@ define i1 @falseblock_cmp_is_true(i32 %x, i32 %y) {
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: br i1 [[CMP]], label [[T:%.*]], label [[F:%.*]]
; CHECK: t:
-; CHECK-NEXT: ret i1 [[CMP]]
+; CHECK-NEXT: ret i1 true
; CHECK: f:
; CHECK-NEXT: ret i1 true
;
@@ -334,7 +334,7 @@ define i1 @falseblock_cmp_is_true_commute(i32 %x, i32 %y) {
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: br i1 [[CMP]], label [[T:%.*]], label [[F:%.*]]
; CHECK: t:
-; CHECK-NEXT: ret i1 [[CMP]]
+; CHECK-NEXT: ret i1 true
; CHECK: f:
; CHECK-NEXT: ret i1 true
;
diff --git a/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll b/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
index 2b5b3fce705354..ef8f5fea4ff7c1 100644
--- a/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
+++ b/llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
@@ -292,7 +292,7 @@ define i1 @test7() {
; CHECK-NEXT: [[CMP:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ true, [[BB7]] ]
; CHECK-NEXT: br i1 [[CMP]], label [[BB10:%.*]], label [[BB7]]
; CHECK: bb10:
-; CHECK-NEXT: ret i1 [[CMP]]
+; CHECK-NEXT: ret i1 true
;
entry:
br label %bb7
diff --git a/llvm/test/Transforms/InstCombine/known-bits.ll b/llvm/test/Transforms/InstCombine/known-bits.ll
index 3482a8e9759929..8cfb987e422f38 100644
--- a/llvm/test/Transforms/InstCombine/known-bits.ll
+++ b/llvm/test/Transforms/InstCombine/known-bits.ll
@@ -1664,11 +1664,9 @@ define i64 @pr92084(double %x) {
; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[X:%.*]], 0.000000e+00
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN1:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then1:
-; CHECK-NEXT: br i1 [[CMP]], label [[IF_ELSE]], label [[IF_THEN2:%.*]]
+; CHECK-NEXT: br i1 true, label [[IF_ELSE]], label [[IF_THEN2:%.*]]
; CHECK: if.then2:
-; CHECK-NEXT: [[CAST:%.*]] = bitcast double [[X]] to i64
-; CHECK-NEXT: [[AND:%.*]] = and i64 [[CAST]], 1
-; CHECK-NEXT: ret i64 [[AND]]
+; CHECK-NEXT: ret i64 poison
; CHECK: if.else:
; CHECK-NEXT: ret i64 0
;
diff --git a/llvm/test/Transforms/InstCombine/phi-known-bits-operand-order.ll b/llvm/test/Transforms/InstCombine/phi-known-bits-operand-order.ll
index a9ebcf629a4029..728ac7bd9fe411 100644
--- a/llvm/test/Transforms/InstCombine/phi-known-bits-operand-order.ll
+++ b/llvm/test/Transforms/InstCombine/phi-known-bits-operand-order.ll
@@ -11,14 +11,12 @@ define void @phi_recurrence_start_first() {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[WHILE_COND:%.*]]
; CHECK: while.cond:
-; CHECK-NEXT: [[CELL_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[START:%.*]], [[FOR_COND26:%.*]] ]
; CHECK-NEXT: [[COND_V:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[COND_V]], label [[IF_THEN:%.*]], label [[WHILE_END:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: [[START]] = add nuw nsw i32 [[CELL_0]], 1
-; CHECK-NEXT: br i1 [[COND_V]], label [[FOR_COND11:%.*]], label [[FOR_COND26]]
+; CHECK-NEXT: br i1 true, label [[FOR_COND11:%.*]], label [[FOR_COND26:%.*]]
; CHECK: for.cond11:
-; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[START]], [[IF_THEN]] ], [ [[STEP:%.*]], [[FOR_COND11]] ]
+; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ 1, [[IF_THEN]] ], [ [[STEP:%.*]], [[FOR_COND11]] ]
; CHECK-NEXT: [[CMP13:%.*]] = icmp ult i32 [[I_1]], 100
; CHECK-NEXT: [[STEP]] = add nuw nsw i32 [[I_1]], 1
; CHECK-NEXT: br i1 [[CMP13]], label [[FOR_COND11]], label [[WHILE_END]]
@@ -57,14 +55,12 @@ define void @phi_recurrence_step_first() {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[WHILE_COND:%.*]]
; CHECK: while.cond:
-; CHECK-NEXT: [[CELL_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[START:%.*]], [[FOR_COND26:%.*]] ]
; CHECK-NEXT: [[COND_V:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[COND_V]], label [[IF_THEN:%.*]], label [[WHILE_END:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: [[START]] = add nuw nsw i32 [[CELL_0]], 1
-; CHECK-NEXT: br i1 [[COND_V]], label [[FOR_COND11:%.*]], label [[FOR_COND26]]
+; CHECK-NEXT: br i1 true, label [[FOR_COND11:%.*]], label [[FOR_COND26:%.*]]
; CHECK: for.cond11:
-; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[STEP:%.*]], [[FOR_COND11]] ], [ [[START]], [[IF_THEN]] ]
+; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[STEP:%.*]], [[FOR_COND11]] ], [ 1, [[IF_THEN]] ]
; CHECK-NEXT: [[CMP13:%.*]] = icmp ult i32 [[I_1]], 100
; CHECK-NEXT: [[STEP]] = add nuw nsw i32 [[I_1]], 1
; CHECK-NEXT: br i1 [[CMP13]], label [[FOR_COND11]], label [[WHILE_END]]
diff --git a/llvm/test/Transforms/InstCombine/phi.ll b/llvm/test/Transforms/InstCombine/phi.ll
index 673c8f6c9488d6..ba29f4290a9fa4 100644
--- a/llvm/test/Transforms/InstCombine/phi.ll
+++ b/llvm/test/Transforms/InstCombine/phi.ll
@@ -1543,7 +1543,7 @@ define i1 @phi_knownnonzero_eq_multiuse_oricmp(i32 %n, i32 %s, ptr %P, i32 %val)
; CHECK-NEXT: [[BOOL2:%.*]] = icmp eq i32 [[PHI]], 0
; CHECK-NEXT: br label [[CLEANUP]]
; CHECK: cleanup:
-; CHECK-NEXT: [[FINAL:%.*]] = phi i1 [ [[CMP1]], [[IF_END]] ], [ [[BOOL2]], [[NEXT]] ]
+; CHECK-NEXT: [[FINAL:%.*]] = phi i1 [ false, [[IF_END]] ], [ [[BOOL2]], [[NEXT]] ]
; CHECK-NEXT: ret i1 [[FINAL]]
;
entry:
@@ -1581,13 +1581,13 @@ define i1 @phi_knownnonzero_ne_multiuse_oricmp_commuted(i32 %n, i32 %s, ptr %P,
; CHECK: if.end:
; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 1, [[IF_THEN]] ], [ [[N]], [[ENTRY:%.*]] ]
; CHECK-NEXT: [[ORPHI:%.*]] = or i32 [[VAL:%.*]], [[PHI]]
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 [[ORPHI]], 0
-; CHECK-NEXT: br i1 [[CMP1]], label [[NEXT:%.*]], label [[CLEANUP:%.*]]
+; CHECK-NEXT: [[CMP1_NOT:%.*]] = icmp eq i32 [[ORPHI]], 0
+; CHECK-NEXT: br i1 [[CMP1_NOT]], label [[CLEANUP:%.*]], label [[NEXT:%.*]]
; CHECK: next:
; CHECK-NEXT: [[BOOL2:%.*]] = icmp ne i32 [[PHI]], 0
; CHECK-NEXT: br label [[CLEANUP]]
; CHECK: cleanup:
-; CHECK-NEXT: [[FINAL:%.*]] = phi i1 [ [[CMP1]], [[IF_END]] ], [ [[BOOL2]], [[NEXT]] ]
+; CHECK-NEXT: [[FINAL:%.*]] = phi i1 [ false, [[IF_END]] ], [ [[BOOL2]], [[NEXT]] ]
; CHECK-NEXT: ret i1 [[FINAL]]
;
entry:
@@ -1634,7 +1634,7 @@ define i1 @phi_knownnonzero_eq_multiuse_andicmp(i32 %n, i32 %s, ptr %P, i32 %val
; CHECK-NEXT: [[BOOL2:%.*]] = icmp eq i32 [[PHI]], 0
; CHECK-NEXT: br label [[CLEANUP]]
; CHECK: cleanup:
-; CHECK-NEXT: [[FINAL:%.*]] = phi i1 [ [[CMP1]], [[IF_END]] ], [ [[BOOL2]], [[NEXT]] ]
+; CHECK-NEXT: [[FINAL:%.*]] = phi i1 [ false, [[IF_END]] ], [ [[BOOL2]], [[NEXT]] ]
; CHECK-NEXT: ret i1 [[FINAL]]
;
entry:
@@ -1675,13 +1675,13 @@ define i1 @phi_knownnonzero_ne_multiuse_andicmp(i32 %n, i32 %s, ptr %P, i32 %val
; CHECK: if.end:
; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[SEL]], [[IF_THEN]] ], [ [[N]], [[ENTRY:%.*]] ]
; CHECK-NEXT: [[ANDPHI:%.*]] = and i32 [[PHI]], [[VAL:%.*]]
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 [[ANDPHI]], 0
-; CHECK-NEXT: br i1 [[CMP1]], label [[NEXT:%.*]], label [[CLEANUP:%.*]]
+; CHECK-NEXT: [[CMP1_NOT:%.*]] = icmp eq i32 [[ANDPHI]], 0
+; CHECK-NEXT: br i1 [[CMP1_NOT]], label [[CLEANUP:%.*]], label [[NEXT:%.*]]
; CHECK: next:
; CHECK-NEXT: [[BOOL2:%.*]] = icmp ne i32 [[PHI]], 0
; CHECK-NEXT: br label [[CLEANUP]]
; CHECK: cleanup:
-; CHECK-NEXT: [[FINAL:%.*]] = phi i1 [ [[CMP1]], [[IF_END]] ], [ [[BOOL2]], [[NEXT]] ]
+; CHECK-NEXT: [[FINAL:%.*]] = phi i1 [ false, [[IF_END]] ], [ [[BOOL2]], [[NEXT]] ]
; CHECK-NEXT: ret i1 [[FINAL]]
;
entry:
diff --git a/llvm/test/Transforms/InstCombine/pr44245.ll b/llvm/test/Transforms/InstCombine/pr44245.ll
index ee5ae2edb42dae..01f209c23592f7 100644
--- a/llvm/test/Transforms/InstCombine/pr44245.ll
+++ b/llvm/test/Transforms/InstCombine/pr44245.ll
@@ -8,54 +8,42 @@ define void @test(i1 %c, ptr %p) {
; CHECK-NEXT: bb16:
; CHECK-NEXT: br i1 [[C:%.*]], label [[BB17:%.*]], label [[BB24:%.*]]
; CHECK: bb17:
-; CHECK-NEXT: [[I:%.*]] = phi ptr [ [[DOTIN1:%.*]], [[BB47:%.*]] ], [ undef, [[BB16:%.*]] ]
-; CHECK-NEXT: store ptr [[I]], ptr [[P:%.*]], align 8
; CHECK-NEXT: ret void
; CHECK: bb24:
-; CHECK-NEXT: br i1 [[C]], label [[BB44:%.*]], label [[BB49:%.*]]
+; CHECK-NEXT: br i1 false, label [[BB44:%.*]], label [[BB49:%.*]]
; CHECK: bb44:
-; CHECK-NEXT: [[TMP46:%.*]] = load ptr, ptr inttoptr (i64 16 to ptr), align 16
-; CHECK-NEXT: br label [[BB47]]
+; CHECK-NEXT: br label [[BB47:%.*]]
; CHECK: bb47:
-; CHECK-NEXT: [[DOTIN1]] = phi ptr [ [[DOTIN:%.*]], [[BB150:%.*]] ], [ [[TMP122:%.*]], [[BB119:%.*]] ], [ [[TMP103:%.*]], [[BB101:%.*]] ], [ [[TMP93:%.*]], [[BB91:%.*]] ], [ [[TMP83:%.*]], [[BB81:%.*]] ], [ [[TMP70:%.*]], [[BB67:%.*]] ], [ [[TMP58:%.*]], [[BB56:%.*]] ], [ [[TMP46]], [[BB44]] ]
; CHECK-NEXT: br label [[BB17]]
; CHECK: bb49:
-; CHECK-NEXT: br i1 [[C]], label [[BB56]], label [[BB59:%.*]]
+; CHECK-NEXT: br i1 false, label [[BB56:%.*]], label [[BB59:%.*]]
; CHECK: bb56:
-; CHECK-NEXT: [[TMP58]] = load ptr, ptr inttoptr (i64 16 to ptr), align 16
; CHECK-NEXT: br label [[BB47]]
; CHECK: bb59:
-; CHECK-NEXT: br i1 [[C]], label [[BB67]], label [[BB71:%.*]]
+; CHECK-NEXT: br i1 false, label [[BB67:%.*]], label [[BB71:%.*]]
; CHECK: bb67:
-; CHECK-NEXT: [[TMP70]] = load ptr, ptr inttoptr (i64 16 to ptr), align 16
; CHECK-NEXT: br label [[BB47]]
; CHECK: bb71:
-; CHECK-NEXT: br i1 [[C]], label [[BB81]], label [[BB84:%.*]]
+; CHECK-NEXT: br i1 false, label [[BB81:%.*]], label [[BB84:%.*]]
; CHECK: bb81:
-; CHECK-NEXT: [[TMP83]] = load ptr, ptr inttoptr (i64 16 to ptr), align 16
; CHECK-NEXT: br label [[BB47]]
; CHECK: bb84:
-; CHECK-NEXT: br i1 [[C]], label [[BB91]], label [[BB94:%.*]]
+; CHECK-NEXT: br i1 false, label [[BB91:%.*]], label [[BB94:%.*]]
; CHECK: bb91:
-; CHECK-NEXT: [[TMP93]] = load ptr, ptr inttoptr (i64 16 to ptr), align 16
; CHECK-NEXT: br label [[BB47]]
; CHECK: bb94:
-; CHECK-NEXT: br i1 [[C]], label [[BB101]], label [[BB104:%.*]]
+; CHECK-NEXT: br i1 false, label [[BB101:%.*]], label [[BB104:%.*]]
; CHECK: bb101:
-; CHECK-NEXT: [[TMP103]] = load ptr, ptr inttoptr (i64 16 to ptr), align 16
; CHECK-NEXT: br label [[BB47]]
; CHECK: bb104:
-; CHECK-NEXT: br i1 [[C]], label [[BB119]], label [[BB123:%.*]]
+; CHECK-NEXT: br i1 false, label [[BB119:%.*]], label [[BB123:%.*]]
; CHECK: bb119:
-; CHECK-NEXT: [[TMP122]] = load ptr, ptr inttoptr (i64 16 to ptr), align 16
; CHECK-NEXT: br label [[BB47]]
; CHECK: bb123:
-; CHECK-NEXT: br i1 [[C]], label [[BB147:%.*]], label [[BB152:%.*]]
+; CHECK-NEXT: br i1 false, label [[BB147:%.*]], label [[BB152:%.*]]
; CHECK: bb147:
-; CHECK-NEXT: [[TMP149:%.*]] = load ptr, ptr inttoptr (i64 16 to ptr), align 16
-; CHECK-NEXT: br label [[BB150]]
+; CHECK-NEXT: br label [[BB150:%.*]]
; CHECK: bb150:
-; CHECK-NEXT: [[DOTIN]] = phi ptr [ poison, [[BB152]] ], [ [[TMP149]], [[BB147]] ]
; CHECK-NEXT: br label [[BB47]]
; CHECK: bb152:
; CHECK-NEXT: store i1 true, ptr poison, align 1
diff --git a/llvm/test/Transforms/InstCombine/sink-into-ncd.ll b/llvm/test/Transforms/InstCombine/sink-into-ncd.ll
index 464cc477a503c9..5fa692d3ae7288 100644
--- a/llvm/test/Transforms/InstCombine/sink-into-ncd.ll
+++ b/llvm/test/Transforms/InstCombine/sink-into-ncd.ll
@@ -60,12 +60,12 @@ define i32 @test2(ptr %addr, i1 %c) {
; CHECK-NEXT: br label [[EXIT]]
; CHECK: right:
; CHECK-NEXT: [[Y:%.*]] = call i32 @use(ptr [[PTR]])
-; CHECK-NEXT: br i1 [[C]], label [[EXIT]], label [[RIGHT_2:%.*]]
+; CHECK-NEXT: br i1 false, label [[EXIT]], label [[RIGHT_2:%.*]]
; CHECK: right.2:
; CHECK-NEXT: [[Z:%.*]] = call i32 @use(ptr [[PTR]])
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[P:%.*]] = phi i32 [ [[X]], [[LEFT]] ], [ [[Y]], [[RIGHT]] ], [ [[Z]], [[RIGHT_2]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[P:%.*]] = phi i32 [ [[X]], [[LEFT]] ], [ poison, [[RIGHT]] ], [ [[Z]], [[RIGHT_2]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i32 [[P]]
;
entry:
diff --git a/llvm/test/Transforms/InstCombine/sink_to_unreachable.ll b/llvm/test/Transforms/InstCombine/sink_to_unreachable.ll
index 02ed22217854ea..922d372618e4d2 100644
--- a/llvm/test/Transforms/InstCombine/sink_to_unreachable.ll
+++ b/llvm/test/Transforms/InstCombine/sink_to_unreachable.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -passes=instcombine -S < %s | FileCheck %s
+; RUN: opt -passes="instcombine<max-iterations=2>" -S < %s | FileCheck %s
declare void @use(i32 %x)
declare i1 @cond()
@@ -42,9 +42,8 @@ define void @test_02(i32 %x, i32 %y) {
; CHECK-NEXT: [[C3:%.*]] = icmp sgt i32 [[X]], [[Y]]
; CHECK-NEXT: br i1 [[C3]], label [[EXIT]], label [[UNREACHED:%.*]]
; CHECK: unreached:
-; CHECK-NEXT: [[C1:%.*]] = icmp eq i32 [[...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/105510
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