[llvm] [MCP] Move dependencies if they block copy propagation (PR #105562)
Gábor Spaits via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 25 13:57:29 PDT 2024
spaits wrote:
> For example, changes in `llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll` can be also achived by disabling pre-RA machine scheduling, i.e., `-enable-misched=0`.
This doesn't work in all the cases. It only works if the scheduler is the one who "spoils" the data dependencies. For example let's see the `llvm/test/CodeGen/X86/xmulo.ll` test:
Here is one function on which this patch improves:
```ll
define zeroext i1 @smuloi8(i8 %v1, i8 %v2, ptr %res) {
%t = call {i8, i1} @llvm.smul.with.overflow.i8(i8 %v1, i8 %v2)
%val = extractvalue {i8, i1} %t, 0
%obit = extractvalue {i8, i1} %t, 1
store i8 %val, ptr %res
ret i1 %obit
}
```
If I compile it without my patch with this command:
```bash
bin/llc -disable-peephole -enable-misched=0 -mtriple=x86_64-linux-unknown X86ex.txt -o oldNoPreRASched.s
```
I get:
```asm
smuloi8: # @smuloi8
# %bb.0:
movl %edi, %eax
imulb %sil
seto %cl
movb %al, (%rdx)
movl %ecx, %eax
retq
```
Same result happens if we leave the `-enable-misched=0` flag.
With my patch with the command:
```bash
bin/llc -disable-peephole -mtriple=x86_64-linux-unknown X86ex.txt -o newPreRASched.s
```
We get:
```asm
smuloi8: # @smuloi8
# %bb.0:
movl %edi, %eax
imulb %sil
movb %al, (%rdx)
seto %al
retq
```
So there are more cases that are not closely related to the scheduler.
https://github.com/llvm/llvm-project/pull/105562
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