[llvm] [AMDGPU] In instruction selector, allow copy from physical reg to s1 (PR #96157)

Jun Wang via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 23 14:28:45 PDT 2024


================
@@ -131,6 +131,13 @@ bool AMDGPUInstructionSelector::selectCOPY(MachineInstr &I) const {
   Register SrcReg = Src.getReg();
 
   if (isVCC(DstReg, *MRI)) {
+    // Allow copy from physical register other than SCC to s1.
+    if (SrcReg.isPhysical() && SrcReg != AMDGPU::SCC) {
+      const TargetRegisterClass *DstRC = MRI->getRegClassOrNull(DstReg);
----------------
jwanggit86 wrote:

I'm not sure I follow. `isVCC()` here checks on `DstReg` to see if its virtual and if its size=1. After that's confirmed, the new code checks if a physical reg can be copied to it. For example, on wave64, copying $sgpr4_sgpr5 is ok but not $sgpr4. Note that the new code is similar to the existing code immediately below that checks for `SrcReg = SCC`.

https://github.com/llvm/llvm-project/pull/96157


More information about the llvm-commits mailing list