[llvm] [llvm][NVPTX] Fix RAUW bug in NVPTXProxyRegErasure (PR #105871)

[Artem Belevich via llvm-commits]

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@@ -0,0 +1,17 @@
+; RUN: llc < %s -verify-machineinstrs
+
+; Check that llc doesn't crash.
+
+target triple = "nvptx64-nvidia-cuda"
+
+define void @__builtin_splat_i8(i32 %0) {
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Artem-B wrote:

Perhaps we could add a more direct MIR test here: llvm/test/CodeGen/NVPTX/proxy-reg-erasure-mir.ll



https://github.com/llvm/llvm-project/pull/105871