[llvm] AMDGPU/NewPM: Port SIFoldOperands to new pass manager (PR #105791)

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git-clang-format --diff a14c7309900f5a61f89b82f6f3d2dc5a51b3e1b4 43c50b599e8085653f1bfd1353e2343f8065eafe --extensions h,cpp -- llvm/lib/Target/AMDGPU/SIFoldOperands.h llvm/lib/Target/AMDGPU/AMDGPU.h llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
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diff --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
index 88c656527d..7ed15f392a 100644
--- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -123,11 +123,11 @@ public:
 public:
   SIFoldOperandsImpl() = default;
 
-  bool run(MachineFunction& MF);
+  bool run(MachineFunction &MF);
 };
 
 class SIFoldOperandsLegacy : public MachineFunctionPass {
-  public:
+public:
   static char ID;
 
   SIFoldOperandsLegacy() : MachineFunctionPass(ID) {}
@@ -149,8 +149,8 @@ class SIFoldOperandsLegacy : public MachineFunctionPass {
 
 } // End anonymous namespace.
 
-INITIALIZE_PASS(SIFoldOperandsLegacy, DEBUG_TYPE,
-                "SI Fold Operands", false, false)
+INITIALIZE_PASS(SIFoldOperandsLegacy, DEBUG_TYPE, "SI Fold Operands", false,
+                false)
 
 char SIFoldOperandsLegacy::ID = 0;
 
@@ -189,8 +189,8 @@ static unsigned macToMad(unsigned Opc) {
 
 // TODO: Add heuristic that the frame index might not fit in the addressing mode
 // immediate offset to avoid materializing in loops.
-bool SIFoldOperandsImpl::frameIndexMayFold(const MachineInstr &UseMI, int OpNo,
-                                       const MachineOperand &OpToFold) const {
+bool SIFoldOperandsImpl::frameIndexMayFold(
+    const MachineInstr &UseMI, int OpNo, const MachineOperand &OpToFold) const {
   if (!OpToFold.isFI())
     return false;
 
@@ -476,9 +476,9 @@ static void appendFoldCandidate(SmallVectorImpl<FoldCandidate> &FoldList,
   FoldList.emplace_back(MI, OpNo, FoldOp, Commuted, ShrinkOp);
 }
 
-bool SIFoldOperandsImpl::tryAddToFoldList(SmallVectorImpl<FoldCandidate> &FoldList,
-                                      MachineInstr *MI, unsigned OpNo,
-                                      MachineOperand *OpToFold) const {
+bool SIFoldOperandsImpl::tryAddToFoldList(
+    SmallVectorImpl<FoldCandidate> &FoldList, MachineInstr *MI, unsigned OpNo,
+    MachineOperand *OpToFold) const {
   const unsigned Opc = MI->getOpcode();
 
   auto tryToFoldAsFMAAKorMK = [&]() {
@@ -658,7 +658,7 @@ bool SIFoldOperandsImpl::tryAddToFoldList(SmallVectorImpl<FoldCandidate> &FoldLi
 }
 
 bool SIFoldOperandsImpl::isUseSafeToFold(const MachineInstr &MI,
-                                     const MachineOperand &UseMO) const {
+                                         const MachineOperand &UseMO) const {
   // Operands of SDWA instructions must be registers.
   return !TII->isSDWA(MI);
 }
@@ -765,11 +765,9 @@ bool SIFoldOperandsImpl::tryToFoldACImm(
 }
 
 void SIFoldOperandsImpl::foldOperand(
-  MachineOperand &OpToFold,
-  MachineInstr *UseMI,
-  int UseOpIdx,
-  SmallVectorImpl<FoldCandidate> &FoldList,
-  SmallVectorImpl<MachineInstr *> &CopiesToReplace) const {
+    MachineOperand &OpToFold, MachineInstr *UseMI, int UseOpIdx,
+    SmallVectorImpl<FoldCandidate> &FoldList,
+    SmallVectorImpl<MachineInstr *> &CopiesToReplace) const {
   const MachineOperand *UseOp = &UseMI->getOperand(UseOpIdx);
 
   if (!isUseSafeToFold(*UseMI, *UseOp))
@@ -1381,7 +1379,7 @@ bool SIFoldOperandsImpl::tryFoldZeroHighBits(MachineInstr &MI) const {
 }
 
 bool SIFoldOperandsImpl::foldInstOperand(MachineInstr &MI,
-                                     MachineOperand &OpToFold) const {
+                                         MachineOperand &OpToFold) const {
   // We need mutate the operands of new mov instructions to add implicit
   // uses of EXEC, but adding them invalidates the use_iterator, so defer
   // this.
@@ -1531,7 +1529,8 @@ bool SIFoldOperandsImpl::tryFoldFoldableCopy(
 
 // Clamp patterns are canonically selected to v_max_* instructions, so only
 // handle them.
-const MachineOperand *SIFoldOperandsImpl::isClamp(const MachineInstr &MI) const {
+const MachineOperand *
+SIFoldOperandsImpl::isClamp(const MachineInstr &MI) const {
   unsigned Op = MI.getOpcode();
   switch (Op) {
   case AMDGPU::V_MAX_F32_e64:
@@ -2256,10 +2255,11 @@ bool SIFoldOperandsImpl::run(MachineFunction &MF) {
   return Changed;
 }
 
-PreservedAnalyses SIFoldOperandsPass::run(MachineFunction &MF, MachineFunctionAnalysisManager&) {
+PreservedAnalyses SIFoldOperandsPass::run(MachineFunction &MF,
+                                          MachineFunctionAnalysisManager &) {
   SIFoldOperandsImpl Impl;
   bool Changed = Impl.run(MF);
-  if(!Changed) {
+  if (!Changed) {
     return PreservedAnalyses::all();
   }
   PreservedAnalyses PA;

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https://github.com/llvm/llvm-project/pull/105791