[llvm] [LLVM][AArch64] Improve big endian code generation for SVE BITCASTs. (PR #104769)
Eli Friedman via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 22 15:46:43 PDT 2024
================
@@ -28877,7 +28885,20 @@ SDValue AArch64TargetLowering::getSVESafeBitCast(EVT VT, SDValue Op,
if (InVT != PackedInVT)
Op = DAG.getNode(AArch64ISD::REINTERPRET_CAST, DL, PackedInVT, Op);
- Op = DAG.getNode(ISD::BITCAST, DL, PackedVT, Op);
+ if (Subtarget->isLittleEndian() ||
+ PackedVT.getScalarSizeInBits() == PackedInVT.getScalarSizeInBits())
+ Op = DAG.getNode(ISD::BITCAST, DL, PackedVT, Op);
+ else {
+ EVT PackedVTAsInt = PackedVT.changeTypeToInteger();
+ EVT PackedInVTAsInt = PackedInVT.changeTypeToInteger();
+
+ // Simulate the effect of casting through memory.
+ Op = DAG.getNode(ISD::BITCAST, DL, PackedInVTAsInt, Op);
+ Op = DAG.getNode(ISD::BSWAP, DL, PackedInVTAsInt, Op);
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efriedma-quic wrote:
Okay, that makes sense.
https://github.com/llvm/llvm-project/pull/104769
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