[llvm] [AArch64][GlobalISel] Legalize 128-bit types for FABS (PR #104753)

[via llvm-commits]

================
@@ -8456,6 +8458,21 @@ LegalizerHelper::lowerAbsToCNeg(MachineInstr &MI) {
   return Legalized;
 }
 
+LegalizerHelper::LegalizeResult LegalizerHelper::lowerFAbs(MachineInstr &MI) {
+  Register SrcReg = MI.getOperand(1).getReg();
+  Register DstReg = MI.getOperand(0).getReg();
+
+  LLT Ty = MRI.getType(DstReg);
+
+  // Reset sign bit
+  MIRBuilder.buildAnd(DstReg, SrcReg,
+                      MIRBuilder.buildConstant(
+                          Ty, APInt::getSignedMaxValue(Ty.getSizeInBits())));
----------------
Him188 wrote:

@tschuett How do I test vectors? Is there a way to unit-test the helper or do I need to find a target which does use the helper for vectors (AArch64 does not).

But if we remove the `scalarizeIf` in AArch64 then `AArch64` will use the helper and hence this can be tested

https://github.com/llvm/llvm-project/pull/104753