[llvm] fe5d1f9 - [ARM] Fix missing ELF FPU attributes for fp-armv8-fullfp16-d16 (#105677)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 22 08:30:30 PDT 2024
Author: Rodolfo Wottrich
Date: 2024-08-22T16:30:27+01:00
New Revision: fe5d1f901a709bc6a2180b7a77b9d5948c6c3482
URL: https://github.com/llvm/llvm-project/commit/fe5d1f901a709bc6a2180b7a77b9d5948c6c3482
DIFF: https://github.com/llvm/llvm-project/commit/fe5d1f901a709bc6a2180b7a77b9d5948c6c3482.diff
LOG: [ARM] Fix missing ELF FPU attributes for fp-armv8-fullfp16-d16 (#105677)
An assembly input with
> .fpu fp-armv8-fullfp16-d16
crashes the compiler because the ELF FPU attribute emitter misses the
respective entry. This patch fixes this.
Interestingly, compiling with -mfpu=fp-armv8-fullfp16-d16 does not cause
the crash because FPv5_D16 is an alias in the compiler and
> .fpu fpv5-d16
is emitted instead, which does not crash.
The existing .fpu directive test with multiple FPUs serves the purpose
of verifying that each possible FPU option is defined, but does not
trigger the crash because only the last .fpu directive goes effectively
down the code path. Therefore one test for each FPU is required.
Fixes #105674.
Added:
llvm/test/MC/ARM/directive-fpu-single-crypto-neon-fp-armv8.s
llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-d16.s
llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-sp-d16.s
llvm/test/MC/ARM/directive-fpu-single-fp-armv8.s
llvm/test/MC/ARM/directive-fpu-single-fpv4-sp-d16.s
llvm/test/MC/ARM/directive-fpu-single-fpv5-d16.s
llvm/test/MC/ARM/directive-fpu-single-fpv5-sp-d16.s
llvm/test/MC/ARM/directive-fpu-single-neon-fp-armv8.s
llvm/test/MC/ARM/directive-fpu-single-neon-fp16.s
llvm/test/MC/ARM/directive-fpu-single-neon-vfpv4.s
llvm/test/MC/ARM/directive-fpu-single-neon.s
llvm/test/MC/ARM/directive-fpu-single-none.s
llvm/test/MC/ARM/directive-fpu-single-vfp.s
llvm/test/MC/ARM/directive-fpu-single-vfpv2.s
llvm/test/MC/ARM/directive-fpu-single-vfpv3-d16-fp16.s
llvm/test/MC/ARM/directive-fpu-single-vfpv3-d16.s
llvm/test/MC/ARM/directive-fpu-single-vfpv3-fp16.s
llvm/test/MC/ARM/directive-fpu-single-vfpv3.s
llvm/test/MC/ARM/directive-fpu-single-vfpv3xd-fp16.s
llvm/test/MC/ARM/directive-fpu-single-vfpv3xd.s
llvm/test/MC/ARM/directive-fpu-single-vfpv4-d16.s
llvm/test/MC/ARM/directive-fpu-single-vfpv4.s
Modified:
llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
llvm/test/MC/ARM/directive-fpu-multiple.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
index 59f29660a77770..c9631bd7c7aac5 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
@@ -992,6 +992,10 @@ void ARMTargetELFStreamer::emitFPUDefaultAttributes() {
// uses the FP_ARMV8_D16 build attribute.
case ARM::FK_FPV5_SP_D16:
case ARM::FK_FPV5_D16:
+ // FPv5 and FP-ARMv8 have the same instructions, so are modeled as one
+ // FPU, but there are two
diff erent names for it depending on the CPU.
+ case ARM::FK_FP_ARMV8_FULLFP16_SP_D16:
+ case ARM::FK_FP_ARMV8_FULLFP16_D16:
S.setAttributeItem(ARMBuildAttrs::FP_arch, ARMBuildAttrs::AllowFPARMv8B,
/* OverwriteExisting= */ false);
break;
diff --git a/llvm/test/MC/ARM/directive-fpu-multiple.s b/llvm/test/MC/ARM/directive-fpu-multiple.s
index ba407654854cd7..b129cbdf1db230 100644
--- a/llvm/test/MC/ARM/directive-fpu-multiple.s
+++ b/llvm/test/MC/ARM/directive-fpu-multiple.s
@@ -22,6 +22,8 @@
.fpu fpv5-d16
.fpu fpv5-sp-d16
.fpu fp-armv8
+ .fpu fp-armv8-fullfp16-d16
+ .fpu fp-armv8-fullfp16-sp-d16
.fpu neon
.fpu neon-fp16
.fpu neon-vfpv4
diff --git a/llvm/test/MC/ARM/directive-fpu-single-crypto-neon-fp-armv8.s b/llvm/test/MC/ARM/directive-fpu-single-crypto-neon-fp-armv8.s
new file mode 100644
index 00000000000000..58af1cbf41513d
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-crypto-neon-fp-armv8.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu crypto-neon-fp-armv8
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: ARMv8-a FP
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-d16.s b/llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-d16.s
new file mode 100644
index 00000000000000..11e1f6b51d9aa8
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-d16.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu fp-armv8-fullfp16-d16
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: ARMv8-a FP-D16
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-sp-d16.s b/llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-sp-d16.s
new file mode 100644
index 00000000000000..6307deb0de400d
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-fp-armv8-fullfp16-sp-d16.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu fp-armv8-fullfp16-sp-d16
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: ARMv8-a FP-D16
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-fp-armv8.s b/llvm/test/MC/ARM/directive-fpu-single-fp-armv8.s
new file mode 100644
index 00000000000000..48eb342849c933
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-fp-armv8.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu fp-armv8
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: ARMv8-a FP
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-fpv4-sp-d16.s b/llvm/test/MC/ARM/directive-fpu-single-fpv4-sp-d16.s
new file mode 100644
index 00000000000000..e1e64c10cc3f79
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-fpv4-sp-d16.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu fpv4-sp-d16
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: VFPv4-D16
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-fpv5-d16.s b/llvm/test/MC/ARM/directive-fpu-single-fpv5-d16.s
new file mode 100644
index 00000000000000..dc03f7a709c9b5
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-fpv5-d16.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu fpv5-d16
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: ARMv8-a FP-D16
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-fpv5-sp-d16.s b/llvm/test/MC/ARM/directive-fpu-single-fpv5-sp-d16.s
new file mode 100644
index 00000000000000..850db4da120e26
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-fpv5-sp-d16.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu fpv5-sp-d16
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: ARMv8-a FP-D16
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-neon-fp-armv8.s b/llvm/test/MC/ARM/directive-fpu-single-neon-fp-armv8.s
new file mode 100644
index 00000000000000..f84d6cf5cc1132
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-neon-fp-armv8.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu neon-fp-armv8
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: ARMv8-a FP
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-neon-fp16.s b/llvm/test/MC/ARM/directive-fpu-single-neon-fp16.s
new file mode 100644
index 00000000000000..fc7520ce8bb75f
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-neon-fp16.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu neon-fp16
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: VFPv3
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-neon-vfpv4.s b/llvm/test/MC/ARM/directive-fpu-single-neon-vfpv4.s
new file mode 100644
index 00000000000000..5c56022f66ac9a
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-neon-vfpv4.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu neon-vfpv4
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: VFPv4
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-neon.s b/llvm/test/MC/ARM/directive-fpu-single-neon.s
new file mode 100644
index 00000000000000..676ed11a14bd03
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-neon.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu neon
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: VFPv3
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-none.s b/llvm/test/MC/ARM/directive-fpu-single-none.s
new file mode 100644
index 00000000000000..aa8df756e3a080
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-none.s
@@ -0,0 +1,10 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu none
+
+@ CHECK-ATTR-NOT: TagName: FP_arch
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-vfp.s b/llvm/test/MC/ARM/directive-fpu-single-vfp.s
new file mode 100644
index 00000000000000..2023236ecf61d5
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-vfp.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu vfp
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: VFPv2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-vfpv2.s b/llvm/test/MC/ARM/directive-fpu-single-vfpv2.s
new file mode 100644
index 00000000000000..7c4d6b37e2b612
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-vfpv2.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu vfp2
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: VFPv2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-vfpv3-d16-fp16.s b/llvm/test/MC/ARM/directive-fpu-single-vfpv3-d16-fp16.s
new file mode 100644
index 00000000000000..adc8cb276190a0
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-vfpv3-d16-fp16.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu vfpv3-d16-fp16
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: VFPv3-D16
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-vfpv3-d16.s b/llvm/test/MC/ARM/directive-fpu-single-vfpv3-d16.s
new file mode 100644
index 00000000000000..a33e1df3f48427
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-vfpv3-d16.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu vfp3-d16
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: VFPv3-D16
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-vfpv3-fp16.s b/llvm/test/MC/ARM/directive-fpu-single-vfpv3-fp16.s
new file mode 100644
index 00000000000000..5238e56bcf1f3a
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-vfpv3-fp16.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu vfpv3-fp16
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: VFPv3
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-vfpv3.s b/llvm/test/MC/ARM/directive-fpu-single-vfpv3.s
new file mode 100644
index 00000000000000..6182b88ba3f9d9
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-vfpv3.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu vfp3
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: VFPv3
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-vfpv3xd-fp16.s b/llvm/test/MC/ARM/directive-fpu-single-vfpv3xd-fp16.s
new file mode 100644
index 00000000000000..6e91c565199db4
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-vfpv3xd-fp16.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu vfpv3xd-fp16
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: VFPv3-D16
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-vfpv3xd.s b/llvm/test/MC/ARM/directive-fpu-single-vfpv3xd.s
new file mode 100644
index 00000000000000..57e9b5379d9664
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-vfpv3xd.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu vfpv3xd
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: VFPv3-D16
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-vfpv4-d16.s b/llvm/test/MC/ARM/directive-fpu-single-vfpv4-d16.s
new file mode 100644
index 00000000000000..604c4c2e941895
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-vfpv4-d16.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu vfpv4-d16
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: VFPv4-D16
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
diff --git a/llvm/test/MC/ARM/directive-fpu-single-vfpv4.s b/llvm/test/MC/ARM/directive-fpu-single-vfpv4.s
new file mode 100644
index 00000000000000..41c043a66b474c
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-fpu-single-vfpv4.s
@@ -0,0 +1,15 @@
+@ Check a single .fpu directive.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj --arch-specific - \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
+
+ .fpu vfpv4
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: VFPv4
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
More information about the llvm-commits
mailing list