[llvm] [AArch64] optimise SVE cvt intrinsics with no active lanes (PR #104809)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 22 08:05:46 PDT 2024
================
@@ -1073,6 +1073,32 @@ static bool isAllActivePredicate(Value *Pred) {
m_ConstantInt<AArch64SVEPredPattern::all>()));
}
+// Simplify unary operation where predicate has all inactive lanes by replacing
+// instruction with its operand
+static std::optional<Instruction *>
+instCombineSVENoActiveUnaryReplace(InstCombiner &IC, IntrinsicInst &II,
+ bool hasInactiveVector) {
+ int PredOperand = hasInactiveVector ? 1 : 0;
+ int ReplaceOperand = hasInactiveVector ? 0 : 1;
+ if (match(II.getOperand(PredOperand), m_ZeroInt())) {
+ IC.replaceInstUsesWith(II, II.getOperand(ReplaceOperand));
+ return IC.eraseInstFromFunction(II);
+ }
+ return std::nullopt;
+}
+
+// Simplify unary operation where predicate has all inactive lanes or try to
+// replace with _x form when all lanes are active
----------------
Lukacma wrote:
Sorry, the comment is not very clear here. I will update it. The idea is, that since we know that all lines are active, we can replace operand used for getting lanes for which predicate is false with `undef` as that operand is never going to be used. I am not sure how much real world impact this will have, but the idea is to remove unnecessary dependency of this intrinsics on operand, which we know is not going to be used anyway
https://github.com/llvm/llvm-project/pull/104809
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