[llvm] [PowerPC] Generate one branch instruction if one block is required (PR #105662)

[Budimir Aranđelović via llvm-commits]

https://github.com/budimirarandjelovichtec created https://github.com/llvm/llvm-project/pull/105662

PPCExpandIsel pass generates two branch instructions if true and/or false block are required. Enable generating one branch instruction if either true or false block is required, but not both.

>From 3954fb56bd4b7ff008a0b07d808ea2c7e5ec01dc Mon Sep 17 00:00:00 2001
From: Budimir Arandjelovic <budimir.arandjelovic at htecgroup.com>
Date: Thu, 22 Aug 2024 16:06:23 +0200
Subject: [PATCH] [PowerPC] Generate one branch instruction if either true or
 false block is required

---
 llvm/lib/Target/PowerPC/PPCExpandISEL.cpp   | 29 ++++++++++++++-------
 llvm/test/CodeGen/PowerPC/expand-isel-1.mir |  5 ++--
 llvm/test/CodeGen/PowerPC/expand-isel-5.mir |  5 ++--
 3 files changed, 23 insertions(+), 16 deletions(-)

diff --git a/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp b/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp
index 4c74e82cf04125..a301c377b2835f 100644
--- a/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp
+++ b/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp
@@ -406,16 +406,25 @@ void PPCExpandISEL::reorganizeBlockLayout(BlockISELList &BIL,
     FalseBlock->addSuccessor(Successor);
   }
 
-  // Conditional branch to the TrueBlock or Successor
-  BuildMI(*MBB, BIL.back(), dl, TII->get(PPC::BC))
-      .add(BIL.back()->getOperand(3))
-      .addMBB(IsTrueBlockRequired ? TrueBlock : Successor);
-
-  // Jump over the true block to the new successor if the condition is false.
-  BuildMI(*(IsFalseBlockRequired ? FalseBlock : MBB),
-          (IsFalseBlockRequired ? FalseBlockI : BIL.back()), dl,
-          TII->get(PPC::B))
-      .addMBB(Successor);
+  if (IsTrueBlockRequired && !IsFalseBlockRequired) {
+    // Jump over the true block to the new successor if the condition is false.
+    BuildMI(*MBB, BIL.back(), dl, TII->get(PPC::BCn))
+        .add(BIL.back()->getOperand(3))
+        .addMBB(Successor);
+  } else if (!IsTrueBlockRequired && IsFalseBlockRequired) {
+    // Jump over the false block to the new successor if the condition is true.
+    BuildMI(*MBB, BIL.back(), dl, TII->get(PPC::BC))
+        .add(BIL.back()->getOperand(3))
+        .addMBB(Successor);
+  } else {
+    // Conditional branch to the TrueBlock
+    BuildMI(*MBB, BIL.back(), dl, TII->get(PPC::BC))
+        .add(BIL.back()->getOperand(3))
+        .addMBB(TrueBlock);
+
+    // Jump over the true block to the new successor if the condition is false.
+    BuildMI(*FalseBlock, FalseBlockI, dl, TII->get(PPC::B)).addMBB(Successor);
+  }
 
   if (IsFalseBlockRequired)
     FalseBlockI = FalseBlock->begin(); // get the position of PPC::B
diff --git a/llvm/test/CodeGen/PowerPC/expand-isel-1.mir b/llvm/test/CodeGen/PowerPC/expand-isel-1.mir
index 35e53980705284..6840ca3547cdca 100644
--- a/llvm/test/CodeGen/PowerPC/expand-isel-1.mir
+++ b/llvm/test/CodeGen/PowerPC/expand-isel-1.mir
@@ -46,10 +46,9 @@ body:             |
     $cr0 = CMPWI $r3, 0
     $r0 = ISEL $zero, $r0, $cr0gt
     ; CHECK-LABEL: testExpandISEL
-    ; CHECK: BC $cr0gt, %[[TRUE:bb.[0-9]+]]
-    ; CHECK-NEXT: B %[[SUCCESSOR:bb.[0-9]+]]
-    ; CHECK: [[TRUE]]
+    ; CHECK: BCn $cr0gt, %[[SUCCESSOR:bb.[0-9]+]]
     ; CHECK: $r0 = ADDI $zero, 0
+    ; CHECK: [[SUCCESSOR]]
 
     $x3 = EXTSW_32_64 $r0
 
diff --git a/llvm/test/CodeGen/PowerPC/expand-isel-5.mir b/llvm/test/CodeGen/PowerPC/expand-isel-5.mir
index 4142ef0fe89e4a..513054e6e2568e 100644
--- a/llvm/test/CodeGen/PowerPC/expand-isel-5.mir
+++ b/llvm/test/CodeGen/PowerPC/expand-isel-5.mir
@@ -45,10 +45,9 @@ body:             |
     $r5 = ADDI $r3, 1
     $cr0 = CMPWI $r3, 0
     $r0 = ISEL $r5, $r0, $cr0gt
-    ; CHECK: BC $cr0gt, %[[TRUE:bb.[0-9]+]]
-    ; CHECK: B %[[SUCCESSOR:bb.[0-9]+]]
-    ; CHECK: [[TRUE]]
+    ; CHECK: BCn $cr0gt, %[[SUCCESSOR:bb.[0-9]+]]
     ; CHECK: $r0 = ADDI $r5, 0
+    ; CHECK: [[SUCCESSOR]]
     $x3 = EXTSW_32_64 $r0
 
 ...