[llvm] [Codegen][LegalizeIntegerTypes] Improve shift through stack (PR #96151)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 22 06:44:37 PDT 2024
================
@@ -238,18 +270,34 @@ define void @ashr_32bytes(ptr %src.ptr, ptr %byteOff.ptr, ptr %dst) nounwind {
; ALL-NEXT: ldp x9, x8, [x0, #16]
; ALL-NEXT: ldr x10, [x1]
; ALL-NEXT: ldr q0, [x0]
-; ALL-NEXT: and x10, x10, #0x1f
+; ALL-NEXT: and x11, x10, #0x18
; ALL-NEXT: stp x9, x8, [sp, #16]
; ALL-NEXT: asr x8, x8, #63
; ALL-NEXT: mov x9, sp
; ALL-NEXT: str q0, [sp]
+; ALL-NEXT: add x9, x9, x11
; ALL-NEXT: stp x8, x8, [sp, #48]
; ALL-NEXT: stp x8, x8, [sp, #32]
-; ALL-NEXT: add x8, x9, x10
-; ALL-NEXT: ldp x10, x9, [x8, #16]
-; ALL-NEXT: ldr q0, [x8]
-; ALL-NEXT: str q0, [x2]
-; ALL-NEXT: stp x10, x9, [x2, #16]
+; ALL-NEXT: lsl x8, x10, #3
----------------
futog wrote:
Maybe we could add a logic the calculate the shifting unit based on the support of unaligned memory access. I was thinking something like this:
`
Align LoadAlign = [&]() {
EVT LoadVT = VT;
do {
LoadVT = TLI.getTypeToTransformTo(*DAG.getContext(), LoadVT);
} while (!TLI.isTypeLegal(LoadVT));
Align LoadAlign(LoadVT.getStoreSize());
for (Align Tmp = LoadAlign;; Tmp = Tmp.previous()) {
unsigned IsFast = 0;
const bool AllowsFastMisalignedMemoryAccesses =
TLI.allowsMisalignedMemoryAccesses(
LoadVT, DAG.getDataLayout().getAllocaAddrSpace(), Tmp,
MachineMemOperand::MOLoad, &IsFast) &&
IsFast;
if (not AllowsFastMisalignedMemoryAccesses) {
break;
}
LoadAlign = Tmp;
if (LoadAlign == Align(1))
break;
}
return LoadAlign;
}();
const unsigned ShiftUnitInBits = LoadAlign.value() * 8;
...
// And load it! While the load is not legal, legalizing it is obvious.
SDValue Res =
DAG.getLoad(VT, dl, Ch, AdjStackPtr,
MachinePointerInfo::getUnknownStack(DAG.getMachineFunction()),
commonAlignment(StackAlign, LoadAlign.value()));
`
@arsenm I know that you have already approved the PR, but what do you think?
https://github.com/llvm/llvm-project/pull/96151
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