[llvm] [SPIRV] Emitting DebugSource, DebugCompileUnit (PR #97558)
Vyacheslav Levytskyy via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 22 03:15:21 PDT 2024
================
@@ -0,0 +1,187 @@
+#include "MCTargetDesc/SPIRVBaseInfo.h"
+#include "MCTargetDesc/SPIRVMCTargetDesc.h"
+#include "SPIRVGlobalRegistry.h"
+#include "SPIRVRegisterInfo.h"
+#include "SPIRVTargetMachine.h"
+#include "llvm/ADT/SmallString.h"
+#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/MachineOperand.h"
+#include "llvm/IR/DebugInfoMetadata.h"
+#include "llvm/IR/Metadata.h"
+#include "llvm/PassRegistry.h"
+#include "llvm/Support/Casting.h"
+#include "llvm/Support/Path.h"
+
+#define DEBUG_TYPE "spirv-nonsemantic-debug-info"
+
+namespace llvm {
+struct SPIRVEmitNonSemanticDI : public MachineFunctionPass {
+ static char ID;
+ SPIRVTargetMachine *TM;
+ SPIRVEmitNonSemanticDI(SPIRVTargetMachine *TM);
+ SPIRVEmitNonSemanticDI();
+
+ bool runOnMachineFunction(MachineFunction &MF) override;
+
+private:
+ bool IsGlobalDIEmitted = false;
+ bool emitGlobalDI(MachineFunction &MF);
+};
+
+void initializeSPIRVEmitNonSemanticDIPass(PassRegistry &);
+
+FunctionPass *createSPIRVEmitNonSemanticDIPass(SPIRVTargetMachine *TM) {
+ return new SPIRVEmitNonSemanticDI(TM);
+}
+} // namespace llvm
+
+using namespace llvm;
+
+INITIALIZE_PASS(SPIRVEmitNonSemanticDI, DEBUG_TYPE,
+ "SPIRV NonSemantic.Shader.DebugInfo.100 emitter", false, false)
+
+char SPIRVEmitNonSemanticDI::ID = 0;
+
+SPIRVEmitNonSemanticDI::SPIRVEmitNonSemanticDI(SPIRVTargetMachine *TM)
+ : MachineFunctionPass(ID), TM(TM) {
+ initializeSPIRVEmitNonSemanticDIPass(*PassRegistry::getPassRegistry());
+}
+
+SPIRVEmitNonSemanticDI::SPIRVEmitNonSemanticDI() : MachineFunctionPass(ID) {
+ initializeSPIRVEmitNonSemanticDIPass(*PassRegistry::getPassRegistry());
+}
+
+bool SPIRVEmitNonSemanticDI::emitGlobalDI(MachineFunction &MF) {
+ // If this MachineFunction doesn't have any BB repeat procedure
+ // for the next
+ if (MF.begin() == MF.end()) {
+ IsGlobalDIEmitted = false;
+ return false;
+ }
+
+ // Required variables to get from metadata search
+ LLVMContext *Context;
+ SmallString<128> FilePath;
+ unsigned SourceLanguage = 0;
+ int64_t DwarfVersion = 0;
+ int64_t DebugInfoVersion = 0;
+
+ // Searching through the Module metadata to find nescessary
+ // information like DwarfVersion or SourceLanguage
+ {
+ const MachineModuleInfo &MMI =
+ getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
+ const Module *M = MMI.getModule();
+ Context = &M->getContext();
+ const NamedMDNode *DbgCu = M->getNamedMetadata("llvm.dbg.cu");
+ if (!DbgCu)
+ return false;
+ for (const auto *Op : DbgCu->operands()) {
+ if (const auto *CompileUnit = dyn_cast<DICompileUnit>(Op)) {
+ DIFile *File = CompileUnit->getFile();
+ sys::path::append(FilePath, File->getDirectory(), File->getFilename());
+ SourceLanguage = CompileUnit->getSourceLanguage();
+ break;
+ }
+ }
+ const NamedMDNode *ModuleFlags = M->getNamedMetadata("llvm.module.flags");
+ for (const auto *Op : ModuleFlags->operands()) {
+ const MDOperand &MaybeStrOp = Op->getOperand(1);
+ if (MaybeStrOp.equalsStr("Dwarf Version"))
+ DwarfVersion =
+ cast<ConstantInt>(
+ cast<ConstantAsMetadata>(Op->getOperand(2))->getValue())
+ ->getSExtValue();
+ else if (MaybeStrOp.equalsStr("Debug Info Version"))
+ DebugInfoVersion =
+ cast<ConstantInt>(
+ cast<ConstantAsMetadata>(Op->getOperand(2))->getValue())
+ ->getSExtValue();
+ }
+ }
+ // NonSemantic.Shader.DebugInfo.100 global DI instruction emitting
+ {
+ // Required LLVM variables for emitting logic
+ const SPIRVInstrInfo *TII = TM->getSubtargetImpl()->getInstrInfo();
+ const SPIRVRegisterInfo *TRI = TM->getSubtargetImpl()->getRegisterInfo();
+ const RegisterBankInfo *RBI = TM->getSubtargetImpl()->getRegBankInfo();
+ SPIRVGlobalRegistry *GR = TM->getSubtargetImpl()->getSPIRVGlobalRegistry();
+ MachineRegisterInfo &MRI = MF.getRegInfo();
+ MachineBasicBlock &MBB = *MF.begin();
+
+ // To correct placement of a OpLabel instruction during SPIRVAsmPrinter
+ // emission all new instructions needs to be placed after OpFunction
+ MachineIRBuilder MIRBuilder(MBB, MBB.end());
----------------
VyacheslavLevytskyy wrote:
Just as an illustration of the issue, the output code from the test case:
```
# After SPIRV NonSemantic.Shader.DebugInfo.100 emitter
# Machine code for function foo: IsSSA, TracksLiveness, Legalized, Selected
bb.1.entry:
%1:type = OpTypeVoid
%2:type = OpTypeFunction %1:type
%0:iid = OpFunction %1:type, 0, %2:type
OpName %0:iid, 7303014
OpDecorate %0:iid, 41, 7303014, 0
OpReturn
%3:id(s32) = OpString 1094795567, 1094795585, 792805697, 1111638594, 1111638594, 1128481583, 1128481603, 1697596227, 1886216568, 1663985004, 0
%4:id(s32) = OpExtInst %1:type, 3, 35, %3:id(s32)
%5:type(s64) = OpTypeInt 32, 0
%6:iid(s32) = OpConstantI %5:type(s64), 5
%7:iid(s32) = OpConstantI %5:type(s64), 3
%8:iid(s32) = OpConstantI %5:type(s64), 21
%9:id(s32) = OpExtInst %1:type, 3, 1, %7:iid(s32), %6:iid(s32), %4:id(s32), %8:iid(s32)
# End machine code for function foo.
```
https://github.com/llvm/llvm-project/pull/97558
More information about the llvm-commits
mailing list