[llvm] [ARM] Fix failure to register-allocate CMP_SWAP_64 pseudo-inst (PR #104039)

[Matthias Braun via llvm-commits]

MatzeB wrote:

It's been a while but to add my two cents:
- From what I remember register constraints in theory can become complicated enough that you need an NP-hard / backtracking algorithm even for assigning a single instruction. In practice it just happens to be that pretty much all ISAs are regular enough that our greedy algorithms work anyway (and it's somewhat fair game for the compiler to error-out on inline assembly with super complex constraints even if there was theoretically a solution available).

Anyway seems like this is a case where we need a slightly better heuristic/greedy algorithm to support it. I would recommend though to try hard not to add logic into the fast-path of regalloc-fast if possible. Maybe there is a way to check if all the priorities of the inputs are the same (or similar criteria) so you can skip the more complex sorting for the average instruction that won't need it.

https://github.com/llvm/llvm-project/pull/104039