[llvm] [AMDGPU] Add MachineVerifer check to detect illegal copies from VGPR to SGPR (PR #105494)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 21 03:24:44 PDT 2024
================
@@ -4613,15 +4613,41 @@ static bool isSubRegOf(const SIRegisterInfo &TRI,
SubReg.getReg() == SuperVec.getReg();
}
+// Verify the illgal copy from VGPR to SGPR for generic opcode COPY
+bool SIInstrInfo::verifyCopy(const MachineInstr &MI,
+ const MachineRegisterInfo &MRI,
+ StringRef &ErrInfo) const {
+ const MachineOperand &Dst = MI.getOperand(0);
+ const MachineOperand &Src = MI.getOperand(1);
+
+ if (Dst.isReg() && Src.isReg()) {
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jayfoad wrote:
MachineVerifier already enforces that both operands are registers so you should not need to check here.
https://github.com/llvm/llvm-project/pull/105494
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