[llvm] [DAG][RISCV] Use vp_reduce_* when widening illegal types for reductions (PR #105455)

[Luke Lau via llvm-commits]

================
@@ -7276,6 +7305,25 @@ SDValue DAGTypeLegalizer::WidenVecOp_VECREDUCE(SDNode *N) {
   unsigned OrigElts = OrigVT.getVectorMinNumElements();
   unsigned WideElts = WideVT.getVectorMinNumElements();
 
+  // Generate a vp.reduce_op if it is custom/legal for the target.  This avoids
+  // need pad the source vector, because the inactive lanes can simply be
----------------
lukel97 wrote:

the need to pad?

https://github.com/llvm/llvm-project/pull/105455