[llvm] [AArch64][SVE] Fold zero-extend into add reduction. (PR #102325)

[David Green via llvm-commits]

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@@ -18166,6 +18166,46 @@ static SDValue performVecReduceAddCombineWithUADDLP(SDNode *N,
   return DAG.getNode(ISD::VECREDUCE_ADD, DL, MVT::i32, UADDLP);
 }
 
+// Turn vecreduce_add(zext/sext(...)) into SVE's  [US]ADDV instruction.
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davemgreen wrote:

There is an extra space in `SVE's  [US]ADDV`

https://github.com/llvm/llvm-project/pull/102325