[llvm] [AArch64] Replace AND with LSL#2 for LDR target (#34101) (PR #89531)
David Green via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 21 01:39:28 PDT 2024
================
@@ -16918,6 +16918,23 @@ bool AArch64TargetLowering::shouldFoldConstantShiftPairToMask(
return (!C1 || !C2 || C1->getZExtValue() >= C2->getZExtValue());
}
+ // We do not need to fold when this shifting used in specific load case:
+ // (ldr x, (add x, (shl (srl x, c1) 2)))
+ if (N->getOpcode() == ISD::SHL && N->hasOneUse()) {
+ if (auto C2 = dyn_cast<ConstantSDNode>(N->getOperand(1))) {
+ unsigned ShlAmt = C2->getZExtValue();
+ if (auto ShouldADD = *N->use_begin();
+ ShouldADD->getOpcode() == ISD::ADD && ShouldADD->hasOneUse()) {
+ if (auto ShouldLOAD = dyn_cast<LoadSDNode>(*ShouldADD->use_begin())) {
+ unsigned ByteVT = ShouldLOAD->getMemoryVT().getSizeInBits() / 8;
+ if ((1 << ShlAmt) == ByteVT &&
----------------
davemgreen wrote:
-> `(1ULL << ShlAmt) == ByteVT`
https://github.com/llvm/llvm-project/pull/89531
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