[llvm] [CodeGen] Get stack alignment from TargetFrameLowering (NFCI) (PR #105477)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 21 00:24:07 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-arm
Author: Sergei Barannikov (s-barannikov)
<details>
<summary>Changes</summary>
It is both easier to use and safer than DL.getStackAlignment() because the DataLayout method asserts if the stack alignment wasn't specified. DL.getStackAlignment() is supposed to be used by middle-end passes.
---
Full diff: https://github.com/llvm/llvm-project/pull/105477.diff
6 Files Affected:
- (modified) llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (+8-6)
- (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (+12-9)
- (modified) llvm/lib/Target/AArch64/AArch64CallingConvention.cpp (+1-2)
- (modified) llvm/lib/Target/ARM/ARMCallingConv.cpp (+4-3)
- (modified) llvm/lib/Target/ARM/ARMISelLowering.cpp (+4-5)
- (modified) llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp (+3-3)
``````````diff
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index bdbef20e20960d..498b37f9360090 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -9133,9 +9133,10 @@ LegalizerHelper::lowerMemcpy(MachineInstr &MI, Register Dst, Register Src,
// Don't promote to an alignment that would require dynamic stack
// realignment.
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
- if (!TRI->hasStackRealignment(MF))
- while (NewAlign > Alignment && DL.exceedsNaturalStackAlignment(NewAlign))
- NewAlign = NewAlign.previous();
+ if (NewAlign > Alignment && !TRI->hasStackRealignment(MF)) {
+ const TargetFrameLowering *TFL = MF.getSubtarget().getFrameLowering();
+ NewAlign = std::min(NewAlign, TFL->getStackAlign());
+ }
if (NewAlign > Alignment) {
Alignment = NewAlign;
@@ -9241,9 +9242,10 @@ LegalizerHelper::lowerMemmove(MachineInstr &MI, Register Dst, Register Src,
// Don't promote to an alignment that would require dynamic stack
// realignment.
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
- if (!TRI->hasStackRealignment(MF))
- while (NewAlign > Alignment && DL.exceedsNaturalStackAlignment(NewAlign))
- NewAlign = NewAlign.previous();
+ if (NewAlign > Alignment && !TRI->hasStackRealignment(MF)) {
+ const TargetFrameLowering *TFL = MF.getSubtarget().getFrameLowering();
+ NewAlign = std::min(NewAlign, TFL->getStackAlign());
+ }
if (NewAlign > Alignment) {
Alignment = NewAlign;
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 18a3b7bce104a7..ebfa8fb7d6395d 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -7893,9 +7893,10 @@ static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, const SDLoc &dl,
// realignment which may conflict with optimizations such as tail call
// optimization.
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
- if (!TRI->hasStackRealignment(MF))
- while (NewAlign > Alignment && DL.exceedsNaturalStackAlignment(NewAlign))
- NewAlign = NewAlign.previous();
+ if (NewAlign > Alignment && !TRI->hasStackRealignment(MF)) {
+ const TargetFrameLowering *TFL = MF.getSubtarget().getFrameLowering();
+ NewAlign = std::min(NewAlign, TFL->getStackAlign());
+ }
if (NewAlign > Alignment) {
// Give the stack frame object a larger alignment if needed.
@@ -8088,9 +8089,10 @@ static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, const SDLoc &dl,
// realignment which may conflict with optimizations such as tail call
// optimization.
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
- if (!TRI->hasStackRealignment(MF))
- while (NewAlign > Alignment && DL.exceedsNaturalStackAlignment(NewAlign))
- NewAlign = NewAlign.previous();
+ if (NewAlign > Alignment && !TRI->hasStackRealignment(MF)) {
+ const TargetFrameLowering *TFL = MF.getSubtarget().getFrameLowering();
+ NewAlign = std::min(NewAlign, TFL->getStackAlign());
+ }
if (NewAlign > Alignment) {
// Give the stack frame object a larger alignment if needed.
@@ -8206,9 +8208,10 @@ static SDValue getMemsetStores(SelectionDAG &DAG, const SDLoc &dl,
// realignment which may conflict with optimizations such as tail call
// optimization.
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
- if (!TRI->hasStackRealignment(MF))
- while (NewAlign > Alignment && DL.exceedsNaturalStackAlignment(NewAlign))
- NewAlign = NewAlign.previous();
+ if (NewAlign > Alignment && !TRI->hasStackRealignment(MF)) {
+ const TargetFrameLowering *TFL = MF.getSubtarget().getFrameLowering();
+ NewAlign = std::min(NewAlign, TFL->getStackAlign());
+ }
if (NewAlign > Alignment) {
// Give the stack frame object a larger alignment if needed.
diff --git a/llvm/lib/Target/AArch64/AArch64CallingConvention.cpp b/llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
index 9a804c12939c4b..1a86af1edb3755 100644
--- a/llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
+++ b/llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
@@ -209,8 +209,7 @@ static bool CC_AArch64_Custom_Block(unsigned &ValNo, MVT &ValVT, MVT &LocVT,
State.AllocateReg(Reg);
}
- const Align StackAlign =
- State.getMachineFunction().getDataLayout().getStackAlignment();
+ const Align StackAlign = Subtarget.getFrameLowering()->getStackAlign();
const Align MemAlign = ArgFlags.getNonZeroMemAlign();
Align SlotAlign = std::min(MemAlign, StackAlign);
if (!Subtarget.isTargetDarwin())
diff --git a/llvm/lib/Target/ARM/ARMCallingConv.cpp b/llvm/lib/Target/ARM/ARMCallingConv.cpp
index 4878c73138940d..243b21ad74c74a 100644
--- a/llvm/lib/Target/ARM/ARMCallingConv.cpp
+++ b/llvm/lib/Target/ARM/ARMCallingConv.cpp
@@ -189,8 +189,9 @@ static bool CC_ARM_AAPCS_Custom_Aggregate(unsigned ValNo, MVT ValVT,
// Try to allocate a contiguous block of registers, each of the correct
// size to hold one member.
- auto &DL = State.getMachineFunction().getDataLayout();
- const Align StackAlign = DL.getStackAlignment();
+ const auto &Subtarget =
+ State.getMachineFunction().getSubtarget<ARMSubtarget>();
+ const Align StackAlign = Subtarget.getFrameLowering()->getStackAlign();
const Align FirstMemberAlign(PendingMembers[0].getExtraInfo());
Align Alignment = std::min(FirstMemberAlign, StackAlign);
@@ -265,7 +266,7 @@ static bool CC_ARM_AAPCS_Custom_Aggregate(unsigned ValNo, MVT ValVT,
State.AllocateReg(Reg);
// Clamp the alignment between 4 and 8.
- if (State.getMachineFunction().getSubtarget<ARMSubtarget>().isTargetAEABI())
+ if (Subtarget.isTargetAEABI())
Alignment = ArgFlags.getNonZeroMemAlign() <= 4 ? Align(4) : Align(8);
// After the first item has been allocated, the rest are packed as tightly as
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 1e8bb8a495e68b..e8760ef5f1692e 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -2461,7 +2461,7 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
// Since callee will pop argument stack as a tail call, we must keep the
// popped size 16-byte aligned.
- Align StackAlign = DAG.getDataLayout().getStackAlignment();
+ Align StackAlign = Subtarget->getFrameLowering()->getStackAlign();
NumBytes = alignTo(NumBytes, StackAlign);
// SPDiff will be negative if this tail call requires more space than we
@@ -4711,9 +4711,8 @@ SDValue ARMTargetLowering::LowerFormalArguments(
if (canGuaranteeTCO(CallConv, TailCallOpt)) {
// The only way to guarantee a tail call is if the callee restores its
// argument area, but it must also keep the stack aligned when doing so.
- const DataLayout &DL = DAG.getDataLayout();
- StackArgSize = alignTo(StackArgSize, DL.getStackAlignment());
-
+ Align StackAlign = Subtarget->getFrameLowering()->getStackAlign();
+ StackArgSize = alignTo(StackArgSize, StackAlign);
AFI->setArgumentStackToRestore(StackArgSize);
}
AFI->setArgumentStackSize(StackArgSize);
@@ -22030,7 +22029,7 @@ Align ARMTargetLowering::getABIAlignmentForCallingConv(
// Avoid over-aligning vector parameters. It would require realigning the
// stack and waste space for no real benefit.
- return std::min(ABITypeAlign, DL.getStackAlignment());
+ return std::min(ABITypeAlign, Subtarget->getFrameLowering()->getStackAlign());
}
/// Return true if a type is an AAPCS-VFP homogeneous aggregate or one of
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index 563601b722c803..be25cf35166ba8 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -1189,9 +1189,9 @@ WebAssemblyTargetLowering::LowerCall(CallLoweringInfo &CLI,
if (IsVarArg && NumBytes) {
// For non-fixed arguments, next emit stores to store the argument values
// to the stack buffer at the offsets computed above.
- int FI = MF.getFrameInfo().CreateStackObject(NumBytes,
- Layout.getStackAlignment(),
- /*isSS=*/false);
+ Align StackAlign = Subtarget->getFrameLowering()->getStackAlign();
+ int FI = MF.getFrameInfo().CreateStackObject(NumBytes, StackAlign,
+ /*isSpillSlot=*/false);
unsigned ValNo = 0;
SmallVector<SDValue, 8> Chains;
for (SDValue Arg : drop_begin(OutVals, NumFixedArgs)) {
``````````
</details>
https://github.com/llvm/llvm-project/pull/105477
More information about the llvm-commits
mailing list